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[82.67.153.177]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a94ec8304dsm2844995e9.12.2026.10.27.12.25.52 for (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 27 Oct 2026 12:25:52 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 19/59] hw/timer/imx_gpt: Wire clock control module via link property Date: Tue, 27 Oct 2026 20:23:00 +0100 Message-ID: <20261027192341.9197-20-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261027192341.9197-1-philmd@oss.qualcomm.com> References: <20261027192341.9197-1-philmd@oss.qualcomm.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDI3MDA3OCBTYWx0ZWRfXzWGV7hcg+jks l6UwY2KIQaAvjmNf8uW5eGnBKmuMFK9bUBgDmPCGr+R48fhzjbzkrJYy6qHngcqTlDJlDMLT9Tc wfIZqU7kgjoEZdeupKMWxXTZzovuJRs= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDI3MDA3OCBTYWx0ZWRfX2XzDeBlYnwHn fBKDWOTXPWoCp+4nzye97p0cjHRdFPcCMwdMz0w12vstS3GYMuT7oodgBzvgO9eytIRcP2Zjrnc 9sOoiSJ45PsN/3FZRFam0Pa0HrP4y8gHD2Le45nIwX1Wdwm9mJ/Po7SL3VRMKovq/HUY3x4efh6 03Zf2Q28GFbXzdhbaDFqJZgisSPigfuEL5Smad//BseWiy4jZrKjaF+HT3UJU0VabwE5yNxMQap z3+5DqHBta7OgrYTeKGGINH5DFbW+rt7TUHhAbC6fRy19FjkdWpzM2wxMdOVCHXTHnm3SKnKIm5 TUymzR/vfFWe8Z8t6lGXp+bFRNBBXi3YHSCkniiduybrP1TsOjMedLvyudrUkPWT0o1Ewg+JpAp HARfAk1etErIv1+NZKeLUcOpDnrLlMaGkx/jzzm4LjG829OnIqZtFhOgab8HknLV8KgKZjgJABa fEITfbXZfr7Z9o16w1w== X-Proofpoint-ORIG-GUID: q7vJtqpWGRfPiu16_uJ9dbLCOb81mKJ9 X-Proofpoint-GUID: q7vJtqpWGRfPiu16_uJ9dbLCOb81mKJ9 X-Authority-Analysis: v=2.4 cv=XaIcX455 c=1 sm=1 tr=0 ts=6ae0fac2 cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=nz36NW0qrpeEijYxj/H2Ew==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=UWXt6i8kVS0SnA6LmccA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-27_05,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 spamscore=0 bulkscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 suspectscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610270078 Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, KHOP_DYNAMIC=0.001, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_PASS, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 From: Bernhard Beschow When wiring struct IMXGPTState to the clock control module, it is currently necessary to reach into its private data. Moreover, when forgetting to wire the clock control module, QEMU will crash after the guest has already started. Fix both by letting struct IMXGPTState expose a link property which is checked at realize time. Inspired-by: Philippe Mathieu-Daudé Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20260921214710.29422-17-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/fsl-imx25.c | 3 ++- hw/arm/fsl-imx31.c | 3 ++- hw/arm/fsl-imx6.c | 3 ++- hw/arm/fsl-imx6ul.c | 3 ++- hw/arm/fsl-imx7.c | 3 ++- hw/arm/fsl-imx8mm.c | 3 ++- hw/arm/fsl-imx8mp.c | 3 ++- hw/timer/imx_gpt.c | 14 ++++++++++++++ 8 files changed, 28 insertions(+), 7 deletions(-) diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index efb22359c5b3..0840c2d86ada 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -138,7 +138,8 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) { FSL_IMX25_GPT4_ADDR, FSL_IMX25_GPT4_IRQ } }; - s->gpt[i].ccm = IMX_CCM(&s->ccm); + object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module", + OBJECT(&s->ccm), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), errp)) { return; diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index dd929c108588..b440ad6e28d7 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -105,7 +105,8 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) serial_table[i].irq)); } - s->gpt.ccm = IMX_CCM(&s->ccm); + object_property_set_link(OBJECT(&s->gpt), "clock-control-module", + OBJECT(&s->ccm), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt), errp)) { return; diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 7ba9b85a2eac..22deb7249639 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -204,7 +204,8 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) qdev_get_gpio_in(gic, serial_table[i].irq)); } - s->gpt.ccm = IMX_CCM(&s->ccm); + object_property_set_link(OBJECT(&s->gpt), "clock-control-module", + OBJECT(&s->ccm), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt), errp)) { return; diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index 84451c99097a..2786889bdafe 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -245,7 +245,8 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) FSL_IMX6UL_GPT2_IRQ, }; - s->gpt[i].ccm = IMX_CCM(&s->ccm); + object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module", + OBJECT(&s->ccm), &error_abort); sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0, diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index fc5d0efe0600..9e206c59a17e 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c @@ -250,7 +250,8 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) FSL_IMX7_GPT4_IRQ, }; - s->gpt[i].ccm = IMX_CCM(&s->ccm); + object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module", + OBJECT(&s->ccm), &error_abort); sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0, FSL_IMX7_GPTn_ADDR[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt[i]), 0, diff --git a/hw/arm/fsl-imx8mm.c b/hw/arm/fsl-imx8mm.c index 875e92bb3473..37934d295111 100644 --- a/hw/arm/fsl-imx8mm.c +++ b/hw/arm/fsl-imx8mm.c @@ -420,7 +420,8 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp) fsl_imx8mm_memmap[FSL_IMX8MM_GPT6].addr, }; - s->gpt[i].ccm = IMX_CCM(&s->ccm); + object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module", + OBJECT(&s->ccm), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), errp)) { return; diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c index bcd91739d9b2..f855378dff2d 100644 --- a/hw/arm/fsl-imx8mp.c +++ b/hw/arm/fsl-imx8mp.c @@ -447,7 +447,8 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error **errp) fsl_imx8mp_memmap[FSL_IMX8MP_GPT6].addr, }; - s->gpt[i].ccm = IMX_CCM(&s->ccm); + object_property_set_link(OBJECT(&s->gpt[i]), "clock-control-module", + OBJECT(&s->ccm), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), errp)) { return; diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c index cdc025712625..22fc8203bfd3 100644 --- a/hw/timer/imx_gpt.c +++ b/hw/timer/imx_gpt.c @@ -15,8 +15,10 @@ #include "qemu/osdep.h" #include "hw/core/irq.h" +#include "hw/core/qdev-properties.h" #include "hw/timer/imx_gpt.h" #include "migration/vmstate.h" +#include "qapi/error.h" #include "qemu/module.h" #include "qemu/log.h" #include "trace.h" @@ -522,6 +524,12 @@ static void imx_gpt_realize(DeviceState *dev, Error **errp) IMXGPTState *s = IMX_GPT(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + if (!s->ccm) { + error_setg(errp, "%s 'clock-control-module' link property not set", + dev->canonical_path); + return; + } + sysbus_init_irq(sbd, &s->irq); memory_region_init_io(&s->iomem, OBJECT(s), &imx_gpt_ops, s, TYPE_IMX_GPT, 0x00001000); @@ -530,12 +538,18 @@ static void imx_gpt_realize(DeviceState *dev, Error **errp) s->timer = ptimer_init(imx_gpt_timeout, s, PTIMER_POLICY_LEGACY); } +static const Property imx_timer_gpt_properties[] = { + DEFINE_PROP_LINK("clock-control-module", IMXGPTState, ccm, TYPE_IMX_CCM, + IMXCCMState *), +}; + static void imx_gpt_class_init(ObjectClass *klass, const void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->realize = imx_gpt_realize; device_class_set_legacy_reset(dc, imx_gpt_reset); + device_class_set_props(dc, imx_timer_gpt_properties); dc->vmsd = &vmstate_imx_timer_gpt; dc->desc = "i.MX general timer"; } -- 2.55.0