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[82.67.153.177]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48e3ebd4ba7sm24630076f8f.33.2026.10.27.12.28.41 for (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 27 Oct 2026 12:28:41 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 44/59] hw/net/lan9118_phy: Trace with QOM path Date: Tue, 27 Oct 2026 20:23:25 +0100 Message-ID: <20261027192341.9197-45-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261027192341.9197-1-philmd@oss.qualcomm.com> References: <20261027192341.9197-1-philmd@oss.qualcomm.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDI3MDA3OCBTYWx0ZWRfX1LDdR6lCISha 8vocTjpq5dGqU6WOhkNWBvmuZeIESZ93kvwWk7hf4Un3Ol764o/ibCYVr6ughCmupJW8R2aSZj2 DTOJFfcXMpmxGNAwZCIyYtGC0yQ20ME= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDI3MDA3OCBTYWx0ZWRfXxR+aYUTzKkyu Jl/9yKyYSYI6nn851J/L4V1ZNpWDBN8uDkFvbOoJQby6FMIPncDloDc3R7iZLkNtUYB1hV3TkvK 1eUqx5cYr+h7jBsFVGImqujKSFl9FtK4kcH/1pEljhZEqw2PUGPCnLhK3XxxGogrJnh61xYAdYk +nLXy/7PyqE2LCGnfZKMW06oZbloxEsd+x2Gi1lg1wIFkIfZfjCodYFJ219g+cdIpkh4FYJH2vI ZQHRTgMsY+ufig8D6rHLdF/VcqVix2TRNSSI0HVjAkAE3UydMxrHrEq5dPRD97K6zAr4gwuiPuq QpaK05rMXE6KpTz0Z/2nBb/3OmLAmB5XqEymCJdVDL+D6NfMKieZdHPGGmuScnj0Dpi5zjaGIeo skfijo5r8tSXZgbLfm+4F1eoZNlDWJUFNUxnZtO5Izzoarz1sY2cLv1dzEVPqnsi+gV3nN0Hy4e ksvetskkjW8aFA4baEw== X-Proofpoint-ORIG-GUID: Ip6hiOQD2K71FHtKQ1L0gHx8z0Ex212f X-Proofpoint-GUID: Ip6hiOQD2K71FHtKQ1L0gHx8z0Ex212f X-Authority-Analysis: v=2.4 cv=XaIcX455 c=1 sm=1 tr=0 ts=6ae0fb6b cx=c_pps a=UgVkIMxJMSkC9lv97toC5g==:117 a=nz36NW0qrpeEijYxj/H2Ew==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=fDfDFZYEbvkheSTyqaYA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=1HOtulTD9v-eNWfpl4qZ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-27_05,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 spamscore=0 bulkscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 suspectscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610270078 Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, KHOP_DYNAMIC=0.001, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_PASS, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 From: Bernhard Beschow Some i.MX SoCs have multiple i.MX network IP blocks which in QEMU use the LAN9118 Phy. Allow to distinguish them via their QOM path when tracing. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20260921214710.29422-42-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/net/lan9118_phy.c | 10 +++++----- hw/net/trace-events | 9 +++++---- 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/hw/net/lan9118_phy.c b/hw/net/lan9118_phy.c index 2fc027d112cc..ee87a51241d1 100644 --- a/hw/net/lan9118_phy.c +++ b/hw/net/lan9118_phy.c @@ -85,14 +85,14 @@ uint16_t lan9118_phy_read(Lan9118PhyState *s, int reg) break; } - trace_lan9118_phy_read(val, reg); + trace_lan9118_phy_read(DEVICE(s)->canonical_path, val, reg); return val; } void lan9118_phy_write(Lan9118PhyState *s, int reg, uint16_t val) { - trace_lan9118_phy_write(val, reg); + trace_lan9118_phy_write(DEVICE(s)->canonical_path, val, reg); switch (reg) { case MII_BMCR: @@ -138,11 +138,11 @@ void lan9118_phy_update_link(Lan9118PhyState *s, bool link_down) /* Autonegotiation status mirrors link status. */ if (link_down) { - trace_lan9118_phy_update_link("down"); + trace_lan9118_phy_link_down(DEVICE(s)->canonical_path); s->status &= ~(MII_BMSR_AN_COMP | MII_BMSR_LINK_ST); s->ints |= PHY_INT_DOWN; } else { - trace_lan9118_phy_update_link("up"); + trace_lan9118_phy_link_up(DEVICE(s)->canonical_path); s->status |= MII_BMSR_AN_COMP | MII_BMSR_LINK_ST; s->ints |= PHY_INT_ENERGYON; s->ints |= PHY_INT_AUTONEG_COMPLETE; @@ -152,7 +152,7 @@ void lan9118_phy_update_link(Lan9118PhyState *s, bool link_down) void lan9118_phy_reset(Lan9118PhyState *s) { - trace_lan9118_phy_reset(); + trace_lan9118_phy_reset(DEVICE(s)->canonical_path); s->control = MII_BMCR_AUTOEN | MII_BMCR_SPEED100; s->status = MII_BMSR_100TX_FD diff --git a/hw/net/trace-events b/hw/net/trace-events index 81af808044e1..839a612d3569 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -11,10 +11,11 @@ allwinner_sun8i_emac_read(uint64_t offset, uint64_t val) "MMIO read: offset=0x%" allwinner_sun8i_emac_write(uint64_t offset, uint64_t val) "MMIO write: offset=0x%" PRIx64 " value=0x%" PRIx64 # lan9118_phy.c -lan9118_phy_read(uint16_t val, int reg) "[0x%02x] -> 0x%04" PRIx16 -lan9118_phy_write(uint16_t val, int reg) "[0x%02x] <- 0x%04" PRIx16 -lan9118_phy_update_link(const char *s) "%s" -lan9118_phy_reset(void) "" +lan9118_phy_read(const char *path, uint16_t val, int reg) "%s: [0x%02x] -> 0x%04" PRIx16 +lan9118_phy_write(const char *path, uint16_t val, int reg) "%s: [0x%02x] <- 0x%04" PRIx16 +lan9118_phy_link_down(const char *path) "%s" +lan9118_phy_link_up(const char *path) "%s" +lan9118_phy_reset(const char *path) "%s" # lance.c lance_mem_readw(uint64_t addr, uint32_t ret) "addr=0x%"PRIx64"val=0x%04x" -- 2.55.0