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Wed, 28 Oct 2026 02:32:02 +0000 From: Jamin Lin To: =?iso-8859-1?Q?C=E9dric_Le_Goater?= , Peter Maydell , Kane Chen , Alistair Francis , Kevin Wolf , Hanna Reitz , Fabiano Rosas , Laurent Vivier , Paolo Bonzini , "open list:ASPEED BMCs" , "open list:All patches CC here" , "open list:Block layer core" CC: Jamin Lin , Troy Lee Subject: [PATCH v2 07/13] hw/arm/aspeed_ast1040: Add FMC and SPI filters as unimplemented devices Thread-Topic: [PATCH v2 07/13] hw/arm/aspeed_ast1040: Add FMC and SPI filters as unimplemented devices Thread-Index: AQHdZoSDmpy5gjTQQkuL9RU4+OXyrw== Date: Wed, 28 Oct 2026 02:32:01 +0000 Message-ID: <20261028023154.48395-8-jamin_lin@aspeedtech.com> References: <20261028023154.48395-1-jamin_lin@aspeedtech.com> In-Reply-To: <20261028023154.48395-1-jamin_lin@aspeedtech.com> Accept-Language: zh-TW, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: mx.microsoft.com 1; dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=aspeedtech.com; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable X-Archived-By: MIME-Version: 1.0 X-OriginatorOrg: aspeedtech.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SEZPR06MB7362.apcprd06.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6086ecc7-6c1f-4430-457c-08df349ba608 X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Oct 2026 02:32:01.9837 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43d4aa98-e35b-4575-8939-080e90d5a249 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: /nqk0NWzLkVjAsmUWyLNdAJ0l0loN32jWZ6rDdqqCcBhqAGjPI6RJY+AU+pXlLJ9MRZBH/REMy7XUG7IkXc9St3D3p89G02pzbUlhI0uhuE= X-MS-Exchange-Transport-CrossTenantHeadersStamped: KUYPR06MB8531 Received-SPF: pass client-ip=2a01:111:f403:c40f::6; envelope-from=jamin_lin@aspeedtech.com; helo=SEYPR02CU001.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 The AST1040 provides filter register regions for the FMC, SPI0 and SPI1=0A= controllers at the following addresses:=0A= =0A= FMC filter: 0x74000400=0A= SPI0 filter: 0x74010400=0A= SPI1 filter: 0x74020400=0A= =0A= These filters are not modeled yet. Add the register regions as=0A= unimplemented devices to reflect the AST1040 memory map.=0A= =0A= Signed-off-by: Jamin Lin =0A= ---=0A= hw/arm/aspeed_ast1040.c | 3 +++=0A= 1 file changed, 3 insertions(+)=0A= =0A= diff --git a/hw/arm/aspeed_ast1040.c b/hw/arm/aspeed_ast1040.c=0A= index 6e3b6900e0..5eb091e675 100644=0A= --- a/hw/arm/aspeed_ast1040.c=0A= +++ b/hw/arm/aspeed_ast1040.c=0A= @@ -87,6 +87,9 @@ static const UnimplementedDeviceConfig aspeed_soc_ast1040= _unimp_devs[] =3D {=0A= { "udc", "aspeed.udc", 0x74120000, 0x4000, -1000 },=0A= { "jtag[0]", "aspeed.jtag0", 0x74C01000, 0x100, -1000 },=0A= { "jtag[1]", "aspeed.jtag1", 0x74C09000, 0x100, -1000 },=0A= + { "fmc-filter", "aspeed.fmc-filter", 0x74000400, 0x1000, -1000 },=0A= + { "spi0-filter", "aspeed.spi0-filter", 0x74010400, 0x1000, -1000 },=0A= + { "spi1-filter", "aspeed.spi1-filter", 0x74020400, 0x1000, -1000 },=0A= { }=0A= };=0A= =0A= -- =0A= 2.53.0=0A=