From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <arikalo@gmail.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
"Pierrick Bouvier" <pierrick.bouvier@oss.qualcomm.com>
Subject: [PATCH 3/4] tests/tcg/mips: Group Release 6 tests
Date: Wed, 28 Oct 2026 20:21:22 +0100 [thread overview]
Message-ID: <20261028192124.30941-4-philmd@oss.qualcomm.com> (raw)
In-Reply-To: <20261028192124.30941-1-philmd@oss.qualcomm.com>
Although meson parallelize build, building the 32 tests is overkill.
Keep the per-opcode files unchanged, but add 5 new files for each
group of instructions:
- logic: and, nor, or, xor
- bitopts: bitswap, dbitswap, clo, clz, dclo, dclz
- multiply: mul, muh, mulu, muhu, dmul, dmuh, dmulu, dmuhu
- shift: sllv, srav, srlv, dsllv, dsrav, dsrlv
- crc: crc32b/h/w/d, crc32cb/ch/cw/cd
These tests return a status instead of calling assert(), so one
failing test doesn't stop the rest of its group (except if crashing
on an illegal instruction).
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
---
tests/tcg/mips64/test_mips64r6_bitops.c | 46 ++++++++++++++++++
tests/tcg/mips64/test_mips64r6_crc.c | 58 +++++++++++++++++++++++
tests/tcg/mips64/test_mips64r6_logic.c | 34 +++++++++++++
tests/tcg/mips64/test_mips64r6_multiply.c | 58 +++++++++++++++++++++++
tests/tcg/mips64/test_mips64r6_shift.c | 46 ++++++++++++++++++
tests/tcg/mips64/meson.build | 37 ++-------------
6 files changed, 247 insertions(+), 32 deletions(-)
create mode 100644 tests/tcg/mips64/test_mips64r6_bitops.c
create mode 100644 tests/tcg/mips64/test_mips64r6_crc.c
create mode 100644 tests/tcg/mips64/test_mips64r6_logic.c
create mode 100644 tests/tcg/mips64/test_mips64r6_multiply.c
create mode 100644 tests/tcg/mips64/test_mips64r6_shift.c
diff --git a/tests/tcg/mips64/test_mips64r6_bitops.c b/tests/tcg/mips64/test_mips64r6_bitops.c
new file mode 100644
index 000000000000..c031a55f504f
--- /dev/null
+++ b/tests/tcg/mips64/test_mips64r6_bitops.c
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* MIPS64R6 tests: bit count and bit swap */
+
+#define main test_mips64r6_bitswap
+#include "test_mips64r6_bitswap.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_dbitswap
+#include "test_mips64r6_dbitswap.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_clo
+#include "test_mips64r6_clo.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_clz
+#include "test_mips64r6_clz.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_dclo
+#include "test_mips64r6_dclo.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_dclz
+#include "test_mips64r6_dclz.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+int main(void)
+{
+ int ret = 0;
+
+ ret |= test_mips64r6_bitswap();
+ ret |= test_mips64r6_dbitswap();
+ ret |= test_mips64r6_clo();
+ ret |= test_mips64r6_clz();
+ ret |= test_mips64r6_dclo();
+ ret |= test_mips64r6_dclz();
+
+ return ret ? 1 : 0;
+}
diff --git a/tests/tcg/mips64/test_mips64r6_crc.c b/tests/tcg/mips64/test_mips64r6_crc.c
new file mode 100644
index 000000000000..dd8d2d2bfcae
--- /dev/null
+++ b/tests/tcg/mips64/test_mips64r6_crc.c
@@ -0,0 +1,58 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* MIPS64R6 tests: CRC32 */
+
+#define main test_mips64r6_crc32b
+#include "test_mips64r6_crc32b.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_crc32h
+#include "test_mips64r6_crc32h.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_crc32w
+#include "test_mips64r6_crc32w.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_crc32d
+#include "test_mips64r6_crc32d.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_crc32cb
+#include "test_mips64r6_crc32cb.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_crc32ch
+#include "test_mips64r6_crc32ch.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_crc32cw
+#include "test_mips64r6_crc32cw.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_crc32cd
+#include "test_mips64r6_crc32cd.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+int main(void)
+{
+ int ret = 0;
+
+ ret |= test_mips64r6_crc32b();
+ ret |= test_mips64r6_crc32h();
+ ret |= test_mips64r6_crc32w();
+ ret |= test_mips64r6_crc32d();
+ ret |= test_mips64r6_crc32cb();
+ ret |= test_mips64r6_crc32ch();
+ ret |= test_mips64r6_crc32cw();
+ ret |= test_mips64r6_crc32cd();
+
+ return ret ? 1 : 0;
+}
diff --git a/tests/tcg/mips64/test_mips64r6_logic.c b/tests/tcg/mips64/test_mips64r6_logic.c
new file mode 100644
index 000000000000..c4c4c4c32164
--- /dev/null
+++ b/tests/tcg/mips64/test_mips64r6_logic.c
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* MIPS64R6 tests: logical */
+
+#define main test_mips64r6_and
+#include "test_mips64r6_and.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_nor
+#include "test_mips64r6_nor.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_or
+#include "test_mips64r6_or.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_xor
+#include "test_mips64r6_xor.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+int main(void)
+{
+ int ret = 0;
+
+ ret |= test_mips64r6_and();
+ ret |= test_mips64r6_nor();
+ ret |= test_mips64r6_or();
+ ret |= test_mips64r6_xor();
+
+ return ret ? 1 : 0;
+}
diff --git a/tests/tcg/mips64/test_mips64r6_multiply.c b/tests/tcg/mips64/test_mips64r6_multiply.c
new file mode 100644
index 000000000000..fceacbbed065
--- /dev/null
+++ b/tests/tcg/mips64/test_mips64r6_multiply.c
@@ -0,0 +1,58 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* MIPS64R6 tests: multiply */
+
+#define main test_mips64r6_mul
+#include "test_mips64r6_mul.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_muh
+#include "test_mips64r6_muh.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_mulu
+#include "test_mips64r6_mulu.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_muhu
+#include "test_mips64r6_muhu.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_dmul
+#include "test_mips64r6_dmul.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_dmuh
+#include "test_mips64r6_dmuh.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_dmulu
+#include "test_mips64r6_dmulu.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_dmuhu
+#include "test_mips64r6_dmuhu.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+int main(void)
+{
+ int ret = 0;
+
+ ret |= test_mips64r6_mul();
+ ret |= test_mips64r6_muh();
+ ret |= test_mips64r6_mulu();
+ ret |= test_mips64r6_muhu();
+ ret |= test_mips64r6_dmul();
+ ret |= test_mips64r6_dmuh();
+ ret |= test_mips64r6_dmulu();
+ ret |= test_mips64r6_dmuhu();
+
+ return ret ? 1 : 0;
+}
diff --git a/tests/tcg/mips64/test_mips64r6_shift.c b/tests/tcg/mips64/test_mips64r6_shift.c
new file mode 100644
index 000000000000..786dfe84bef4
--- /dev/null
+++ b/tests/tcg/mips64/test_mips64r6_shift.c
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* MIPS64R6 tests: variable shift */
+
+#define main test_mips64r6_sllv
+#include "test_mips64r6_sllv.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_srav
+#include "test_mips64r6_srav.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_srlv
+#include "test_mips64r6_srlv.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_dsllv
+#include "test_mips64r6_dsllv.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_dsrav
+#include "test_mips64r6_dsrav.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+#define main test_mips64r6_dsrlv
+#include "test_mips64r6_dsrlv.c"
+#undef main
+#undef TEST_COUNT_TOTAL
+
+int main(void)
+{
+ int ret = 0;
+
+ ret |= test_mips64r6_sllv();
+ ret |= test_mips64r6_srav();
+ ret |= test_mips64r6_srlv();
+ ret |= test_mips64r6_dsllv();
+ ret |= test_mips64r6_dsrav();
+ ret |= test_mips64r6_dsrlv();
+
+ return ret ? 1 : 0;
+}
diff --git a/tests/tcg/mips64/meson.build b/tests/tcg/mips64/meson.build
index c80a3716f559..495acf3b81a6 100644
--- a/tests/tcg/mips64/meson.build
+++ b/tests/tcg/mips64/meson.build
@@ -27,38 +27,11 @@ endif
tests = []
tests_mips64r6 = [
- '../mips64/test_mips64r6_and.c',
- '../mips64/test_mips64r6_bitswap.c',
- '../mips64/test_mips64r6_clo.c',
- '../mips64/test_mips64r6_clz.c',
- '../mips64/test_mips64r6_crc32b.c',
- '../mips64/test_mips64r6_crc32cb.c',
- '../mips64/test_mips64r6_crc32cd.c',
- '../mips64/test_mips64r6_crc32ch.c',
- '../mips64/test_mips64r6_crc32cw.c',
- '../mips64/test_mips64r6_crc32d.c',
- '../mips64/test_mips64r6_crc32h.c',
- '../mips64/test_mips64r6_crc32w.c',
- '../mips64/test_mips64r6_dbitswap.c',
- '../mips64/test_mips64r6_dclo.c',
- '../mips64/test_mips64r6_dclz.c',
- '../mips64/test_mips64r6_dmuh.c',
- '../mips64/test_mips64r6_dmuhu.c',
- '../mips64/test_mips64r6_dmul.c',
- '../mips64/test_mips64r6_dmulu.c',
- '../mips64/test_mips64r6_dsllv.c',
- '../mips64/test_mips64r6_dsrav.c',
- '../mips64/test_mips64r6_dsrlv.c',
- '../mips64/test_mips64r6_muh.c',
- '../mips64/test_mips64r6_muhu.c',
- '../mips64/test_mips64r6_mul.c',
- '../mips64/test_mips64r6_mulu.c',
- '../mips64/test_mips64r6_nor.c',
- '../mips64/test_mips64r6_or.c',
- '../mips64/test_mips64r6_sllv.c',
- '../mips64/test_mips64r6_srav.c',
- '../mips64/test_mips64r6_srlv.c',
- '../mips64/test_mips64r6_xor.c',
+ '../mips64/test_mips64r6_bitops.c',
+ '../mips64/test_mips64r6_crc.c',
+ '../mips64/test_mips64r6_logic.c',
+ '../mips64/test_mips64r6_multiply.c',
+ '../mips64/test_mips64r6_shift.c',
]
foreach src: tests_mips64r6
--
2.55.0
next prev parent reply other threads:[~2026-10-28 19:22 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-28 19:21 [PATCH 0/4] tests/tcg: Massage MIPS tests for easier maintenance Philippe Mathieu-Daudé
2026-10-28 19:21 ` [PATCH 1/4] tests/tcg/mips: Clear DSPControl at start of DSP tests Philippe Mathieu-Daudé
2026-10-28 19:21 ` [PATCH 2/4] tests/tcg/mips: Group " Philippe Mathieu-Daudé
2026-10-28 19:21 ` Philippe Mathieu-Daudé [this message]
2026-10-28 19:21 ` [PATCH 4/4] tests/tcg/mips: Group MSA tests Philippe Mathieu-Daudé
2026-10-28 20:07 ` [PATCH 0/4] tests/tcg: Massage MIPS tests for easier maintenance Pierrick Bouvier
2026-10-29 7:04 ` Philippe Mathieu-Daudé
2026-10-29 7:47 ` Pierrick Bouvier
2026-10-29 8:16 ` Philippe Mathieu-Daudé
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