From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A20C0606A322 for ; Thu, 29 Oct 2026 05:09:37 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [127.0.0.1]) by lists.ozlabs.org (Postfix) with ESMTP id 4jFXMS5z0mz30TQ; Thu, 29 Oct 2026 16:09:08 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; arc=none smtp.remote-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1793250548; cv=none; b=ZfaRL3wE0BpWZInrio8d45fLm9XerXD9JCueqxBJiYh7MLrEBEYJzLduJk+yMPMgdqHjLb8KEpcKWBaoXZgJZWA6eANkv+1e3UQnqUiAz/ldXSC14MbtnfNTymMBNwRrAcFtVn0Rdc1qptdF80HSiStHdGZdluZfeDHtF0rTPbBGtrzLqjR33PxdkCujM6ilEDwGlK1ugvJOVfwx37w2i3IeaAxEy3ZBHdp1Na9IB6Sky9y5CmOw0G4ctObUc77WjRz+l/leRTvWkTRy1PfVlP5NeJFik4wjoTSS7+oFcgKliTE3ePrnEdOttL87tZh58XpEBxLpqmSFRiMblLBFyA== ARC-Message-Signature: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1793250548; c=relaxed/relaxed; bh=oY43e2m8NBgZ60rH9epx/h0Bogv/uU4+Txa6i9nRUkE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=gZanwLSov9F6CdGDwjkJG4PeCFEXpTie2FDBCuduho4g8J320KqzuUUtEFIjzptatkw+U2Akaht294aDvU19HNDZrQKqxtpjJY3A+HUD/DGFIWoLDozaLkK2n9P/qNz1MERhjm6g6N8bGKbx24pvgaYnY8PbOGMIysonqC5OrMUmA7b1LOvotWaBB83XJPBciCKDPMTjxOyIhKJJm+BCT0YSUi6tBnpVtFWFI+FKZTYXpGjhtKsJ1/FX++v4MS+k3Ifb9wm3PdFeGgLZtMo8BYOwarLU1NcZoGUQyRI2Jgid3itVKUuGgKvoR2FvO76a7wBeuOqcDGrBdO0fRIWS5A== ARC-Authentication-Results: i=1; lists.ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass (client-ip=211.20.114.72; helo=twmbx01.aspeedtech.com; envelope-from=vince_chang@aspeedtech.com; receiver=lists.ozlabs.org) smtp.mailfrom=aspeedtech.com Authentication-Results: lists.ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=aspeedtech.com (client-ip=211.20.114.72; helo=twmbx01.aspeedtech.com; envelope-from=vince_chang@aspeedtech.com; receiver=lists.ozlabs.org) Received: from twmbx01.aspeedtech.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4jFXMR4rTWz30RN for ; Thu, 29 Oct 2026 16:09:07 +1100 (AEDT) Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Thu, 29 Oct 2026 13:08:47 +0800 Received: from aspeed-fw02.aspeed.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Thu, 29 Oct 2026 13:08:47 +0800 From: Vince Chang To: , , CC: Chin-Ting Kuo , , "Guenter Roeck" , Wim Van Sebroeck Subject: [PATCH linux dev-6.18 2/4] watchdog: aspeed: Support variable number of reset mask registers Date: Thu, 29 Oct 2026 13:08:43 +0800 Message-ID: <20261029050847.810331-3-vince_chang@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261029050847.810331-1-vince_chang@aspeedtech.com> References: <20261029050847.810331-1-vince_chang@aspeedtech.com> X-Mailing-List: openbmc@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Subscribe: , , Precedence: list X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_PASS,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 From: Chin-Ting Kuo Starting from the AST2600 platform, the SoC design has become more complex, with an increased number of reset mask registers. To support this, introduce a new field 'num_reset_masks' in the 'aspeed_wdt_config' structure to specify the number of reset mask registers per platform. This change removes the need for hardcoded platform-specific logic and improves scalability for future SoCs. Signed-off-by: Chin-Ting Kuo Reviewed-by: Guenter Roeck Signed-off-by: Guenter Roeck Signed-off-by: Wim Van Sebroeck (cherry picked from commit 0eb54296dc784de757724055983d32b03c9e2df1) Signed-off-by: Vince Chang --- drivers/watchdog/aspeed_wdt.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c index 837e15701c0e..d23e565f30a8 100644 --- a/drivers/watchdog/aspeed_wdt.c +++ b/drivers/watchdog/aspeed_wdt.c @@ -35,6 +35,7 @@ struct aspeed_wdt_config { u32 irq_shift; u32 irq_mask; struct aspeed_wdt_scu scu; + u32 num_reset_masks; }; struct aspeed_wdt { @@ -66,6 +67,7 @@ static const struct aspeed_wdt_config ast2500_config = { .wdt_reset_mask = 0x1, .wdt_reset_mask_shift = 2, }, + .num_reset_masks = 1, }; static const struct aspeed_wdt_config ast2600_config = { @@ -78,6 +80,7 @@ static const struct aspeed_wdt_config ast2600_config = { .wdt_reset_mask = 0xf, .wdt_reset_mask_shift = 16, }, + .num_reset_masks = 2, }; static const struct of_device_id aspeed_wdt_of_table[] = { @@ -479,11 +482,11 @@ static int aspeed_wdt_probe(struct platform_device *pdev) set_bit(WDOG_HW_RUNNING, &wdt->wdd.status); } - if ((of_device_is_compatible(np, "aspeed,ast2500-wdt")) || - (of_device_is_compatible(np, "aspeed,ast2600-wdt"))) { + if (!of_device_is_compatible(np, "aspeed,ast2400-wdt")) { u32 reset_mask[2]; - size_t nrstmask = of_device_is_compatible(np, "aspeed,ast2600-wdt") ? 2 : 1; + size_t nrstmask = wdt->cfg->num_reset_masks; u32 reg = readl(wdt->base + WDT_RESET_WIDTH); + int i; reg &= wdt->cfg->ext_pulse_width_mask; if (of_property_read_bool(np, "aspeed,ext-active-high")) @@ -503,9 +506,8 @@ static int aspeed_wdt_probe(struct platform_device *pdev) ret = of_property_read_u32_array(np, "aspeed,reset-mask", reset_mask, nrstmask); if (!ret) { - writel(reset_mask[0], wdt->base + WDT_RESET_MASK1); - if (nrstmask > 1) - writel(reset_mask[1], wdt->base + WDT_RESET_MASK2); + for (i = 0; i < nrstmask; i++) + writel(reset_mask[i], wdt->base + WDT_RESET_MASK1 + i * 4); } } -- 2.43.0