From: Yu-Chien Peter Lin <peter.lin@sifive.com>
To: opensbi@lists.infradead.org
Cc: anup@brainfault.org, pawandeep.oza@oss.qualcomm.com,
rkrcmar@qti.qualcomm.com, raymond.mao@riscstar.com,
robin.randhawa@sifive.com, samuel.holland@sifive.com,
zong.li@sifive.com, greentime.hu@sifive.com,
Yu-Chien Peter Lin <peter.lin@sifive.com>
Subject: [PATCH v4 6/9] lib: sbi_hart_worlds: Implement WID hart protection backend
Date: Fri, 30 Oct 2026 18:45:15 +0800 [thread overview]
Message-ID: <20261030104518.3297875-7-peter.lin@sifive.com> (raw)
In-Reply-To: <20261030104518.3297875-1-peter.lin@sifive.com>
Introduce a WID-based hart protection backend that switches World ID
configurations across domains.
Access to slwid is gated by mwiddeleg (Sswid), which means slwid cannot
be handled by generic hart_context save/restore. Instead, manage slwid as
domain state with explicit sequencing:
- configure:
- Validate and program mlwid and mwiddeleg according to domain policy
and platform constraints (pmlwidlist/mlwidlist).
- Restore slwid after mwiddeleg is enabled.
- unconfigure:
- Save slwid prior to clearing mwiddeleg.
- Reset mwiddeleg to 0 to disable Sswid.
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Reviewed-by: Pawandeep Oza <pawandeep.oza@oss.qualcomm.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
include/sbi/sbi_hart_worlds.h | 24 ++++
lib/sbi/objects.mk | 1 +
lib/sbi/sbi_hart.c | 5 +
lib/sbi/sbi_hart_worlds.c | 210 ++++++++++++++++++++++++++++++++++
4 files changed, 240 insertions(+)
create mode 100644 include/sbi/sbi_hart_worlds.h
create mode 100644 lib/sbi/sbi_hart_worlds.c
diff --git a/include/sbi/sbi_hart_worlds.h b/include/sbi/sbi_hart_worlds.h
new file mode 100644
index 00000000..91b11023
--- /dev/null
+++ b/include/sbi/sbi_hart_worlds.h
@@ -0,0 +1,24 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2026 SiFive Inc.
+ */
+
+#ifndef __SBI_HART_WORLDS_H__
+#define __SBI_HART_WORLDS_H__
+
+struct sbi_scratch;
+
+/**
+ * Initialize WID hart protection for current HART
+ *
+ * Registers the WID protection mechanism if Smlwid
+ * extension is present.
+ *
+ * @param scratch pointer to scratch space of current HART
+ *
+ * @return 0 on success and negative error code on failure
+ */
+int sbi_hart_worlds_init(struct sbi_scratch *scratch);
+
+#endif /* __SBI_HART_WORLDS_H__ */
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index ae27d0c5..355ae6e9 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -77,6 +77,7 @@ libsbi-objs-y += sbi_fwft.o
libsbi-objs-y += sbi_hart.o
libsbi-objs-y += sbi_hart_pmp.o
libsbi-objs-y += sbi_hart_protection.o
+libsbi-objs-y += sbi_hart_worlds.o
libsbi-objs-y += sbi_heap.o
libsbi-objs-y += sbi_math.o
libsbi-objs-y += sbi_hfence.o
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 611c97bf..f7408f51 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -17,6 +17,7 @@
#include <sbi/sbi_error.h>
#include <sbi/sbi_hart.h>
#include <sbi/sbi_hart_pmp.h>
+#include <sbi/sbi_hart_worlds.h>
#include <sbi/sbi_platform.h>
#include <sbi/sbi_pmu.h>
#include <sbi/sbi_string.h>
@@ -742,6 +743,10 @@ int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot)
rc = sbi_hart_pmp_init(scratch);
if (rc)
return rc;
+
+ rc = sbi_hart_worlds_init(scratch);
+ if (rc)
+ return rc;
}
return sbi_hart_reinit(scratch);
diff --git a/lib/sbi/sbi_hart_worlds.c b/lib/sbi/sbi_hart_worlds.c
new file mode 100644
index 00000000..6f582bd2
--- /dev/null
+++ b/lib/sbi/sbi_hart_worlds.c
@@ -0,0 +1,210 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2026 SiFive Inc.
+ */
+
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_bitops.h>
+#include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_hart_protection.h>
+#include <sbi/sbi_hart_worlds.h>
+#include <sbi/sbi_scratch.h>
+
+/**
+ * Initialize the per-hart slwid values of a domain using
+ * the lowest delegated WID as the initial value.
+ *
+ * S-mode OS should choose the desire slwid for it's
+ * U-mode.
+ */
+static int sbi_hart_worlds_state_setup(struct sbi_domain *dom,
+ struct sbi_domain_state *state,
+ void *state_ptr)
+{
+ unsigned long widdeleg = dom->widdeleg;
+ unsigned long *slwid = state_ptr;
+ unsigned long init_wid;
+
+ if (!widdeleg)
+ return SBI_OK;
+
+ init_wid = sbi_ffs(widdeleg);
+ sbi_for_each_hartindex(i)
+ slwid[i] = init_wid;
+
+ return SBI_OK;
+}
+
+static struct sbi_domain_state wid_state = {
+ .state_setup = sbi_hart_worlds_state_setup,
+};
+
+static unsigned long *sbi_hart_worlds_slwid_ptr(struct sbi_domain *dom)
+{
+ unsigned long *slwid;
+
+ slwid = sbi_domain_state_ptr(dom, &wid_state);
+ if (!slwid || !sbi_hartindex_valid(current_hartindex()))
+ return NULL;
+
+ return &slwid[current_hartindex()];
+}
+
+static int hart_worlds_validate_wid(struct sbi_scratch *scratch,
+ struct sbi_domain *dom,
+ unsigned long mlwidlist)
+{
+ struct sbi_hart_features *hf = sbi_hart_features_ptr(scratch);
+
+ if (hf->has_pmlwidlist && !(hf->pmlwidlist & BIT_ULL(dom->wid))) {
+ sbi_printf("%s: domain%d WID %u not permitted by"
+ " pmlwidlist\n",
+ __func__, dom->index, dom->wid);
+ return SBI_EINVAL;
+ }
+
+ if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMLWIDLIST) &&
+ !(mlwidlist & BIT_ULL(dom->wid))) {
+ sbi_printf("%s: domain%d WID %u not permitted by"
+ " mlwidlist 0x%lx\n",
+ __func__, dom->index, dom->wid, mlwidlist);
+ return SBI_EINVAL;
+ }
+
+ return SBI_OK;
+}
+
+/*
+ * Validate that a domain's widdeleg value, parsed from the
+ * "widdeleg" DT property, is permitted on this hart.
+ *
+ * mwiddeleg is a M-mode WARL register, so an S-mode OS must rely
+ * on the "widdeleg" DT property to determine which WIDs it may
+ * delegate to U-mode via slwid. If pmwidlist or mlwidlist silently
+ * filters out any of those WIDs, the S-mode OS's view of the WIDs
+ * available for delegation would be incorrect. Treat this mismatch
+ * as a misconfiguration.
+ */
+static int hart_worlds_validate_widdeleg(struct sbi_scratch *scratch,
+ struct sbi_domain *dom,
+ unsigned long mlwidlist)
+{
+ struct sbi_hart_features *hf = sbi_hart_features_ptr(scratch);
+ unsigned long widdeleg = dom->widdeleg;
+
+ if (!widdeleg)
+ return SBI_OK;
+
+ if (hf->has_pmlwidlist && (widdeleg & ~hf->pmlwidlist)) {
+ sbi_printf("%s: domain%d widdeleg 0x%lx has WID(s)"
+ " outside pmlwidlist 0x%lx\n",
+ __func__, dom->index, widdeleg,
+ (unsigned long)hf->pmlwidlist);
+ return SBI_EINVAL;
+ }
+
+ if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMLWIDLIST) &&
+ (widdeleg & ~mlwidlist)) {
+ sbi_printf("%s: domain%d widdeleg 0x%lx has WID(s)"
+ " outside mlwidlist 0x%lx\n",
+ __func__, dom->index, widdeleg, mlwidlist);
+ return SBI_EINVAL;
+ }
+
+ return SBI_OK;
+}
+
+static int sbi_hart_worlds_configure(struct sbi_scratch *scratch,
+ struct sbi_domain *dom)
+{
+ unsigned long *slwid = NULL;
+ unsigned long mlwidlist = 0;
+ int rc;
+
+ if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SMLWID))
+ return SBI_OK;
+
+ if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMLWIDLIST))
+ mlwidlist = csr_read(CSR_MLWIDLIST);
+
+ rc = hart_worlds_validate_wid(scratch, dom, mlwidlist);
+ if (rc)
+ return rc;
+
+ csr_write(CSR_MLWID, dom->wid);
+
+ if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SMWIDDELEG))
+ return SBI_OK;
+
+ rc = hart_worlds_validate_widdeleg(scratch, dom, mlwidlist);
+ if (rc)
+ return rc;
+
+ /*
+ * Enable Sswid before restoring slwid. A zero mwiddeleg
+ * disables access to slwid, so the order here is required.
+ */
+ csr_write(CSR_MWIDDELEG, dom->widdeleg);
+
+ if (dom->widdeleg) {
+ slwid = sbi_hart_worlds_slwid_ptr(dom);
+ if (!slwid)
+ return SBI_EINVAL;
+ csr_write(CSR_SLWID, *slwid);
+ }
+
+ return SBI_OK;
+}
+
+static void sbi_hart_worlds_unconfigure(struct sbi_scratch *scratch,
+ struct sbi_domain *dom)
+{
+ unsigned long *slwid;
+
+ if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SMWIDDELEG) ||
+ !dom->widdeleg)
+ return;
+
+ /*
+ * Save slwid value before disabling Sswid since the
+ * CSR value may not retain through the disabled period.
+ */
+ slwid = sbi_hart_worlds_slwid_ptr(dom);
+ if (!slwid) {
+ sbi_panic("%s: domain%d has no slwid state\n",
+ __func__, dom->index);
+ }
+ *slwid = csr_read(CSR_SLWID);
+
+ /* Disable Sswid */
+ csr_write(CSR_MWIDDELEG, 0);
+}
+
+static struct sbi_hart_protection wid_protection = {
+ .name = "wid",
+ .rating = 100,
+ .type = SBI_HART_PROTECTION_TYPE_ID,
+ .configure = sbi_hart_worlds_configure,
+ .unconfigure = sbi_hart_worlds_unconfigure
+};
+
+int sbi_hart_worlds_init(struct sbi_scratch *scratch)
+{
+ int rc;
+
+ if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SMLWID))
+ return 0;
+
+ if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMWIDDELEG)) {
+ wid_state.state_size = sizeof(unsigned long) * sbi_hart_count();
+ rc = sbi_domain_register_state(&wid_state);
+ if (rc)
+ return rc;
+ }
+
+ return sbi_hart_protection_register(&wid_protection);
+}
--
2.43.7
--
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next prev parent reply other threads:[~2026-10-30 10:45 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-30 10:45 [PATCH v4 0/9] Add RISC-V Worlds ISA support to OpenSBI Yu-Chien Peter Lin
2026-10-30 10:45 ` [PATCH v4 1/9] lib: sbi_hart: add RISC-V Worlds ISA extensions Yu-Chien Peter Lin
2026-10-31 12:48 ` Anup Patel
2026-10-30 10:45 ` [PATCH v4 2/9] lib: utils: fdt_helper: parse RISC-V Worlds per-hart WID properties Yu-Chien Peter Lin
2026-10-31 12:48 ` Anup Patel
2026-10-30 10:45 ` [PATCH v4 3/9] lib: fdt_domain: parse domain " Yu-Chien Peter Lin
2026-10-31 12:49 ` Anup Patel
2026-10-30 10:45 ` [PATCH v4 4/9] lib: sbi_hart: lock mwid CSR for RoT immutability Yu-Chien Peter Lin
2026-10-30 10:45 ` [PATCH v4 5/9] lib: sbi_domain_context: propagate error from sbi_hart_protection_reconfigure Yu-Chien Peter Lin
2026-10-30 10:45 ` Yu-Chien Peter Lin [this message]
2026-11-10 3:36 ` [PATCH v4 6/9] lib: sbi_hart_worlds: Implement WID hart protection backend Yu-Chien Peter Lin
2026-10-30 10:45 ` [PATCH v4 7/9] include: sbi_types: add PRIx64 format macro Yu-Chien Peter Lin
2026-10-30 10:45 ` [PATCH v4 8/9] lib: sbi: display World ID configuration at boot Yu-Chien Peter Lin
2026-10-30 10:45 ` [PATCH v4 9/9] docs: document WID DT properties Yu-Chien Peter Lin
2026-10-31 12:49 ` Anup Patel
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