From: Leo Yan <leo.yan@arm.com>
To: sashiko-reviews@lists.linux.dev
Cc: linux-perf-users@vger.kernel.org
Subject: Re: [PATCH v2 10/14] perf cs-etm: Synthesize exception entries separately from branches
Date: Fri, 30 Oct 2026 11:12:34 +0000 [thread overview]
Message-ID: <20261030111234.GE9176@e132581.arm.com> (raw)
In-Reply-To: <20260923163605.3962C1F000FF@smtp.kernel.org>
On Wed, Sep 23, 2026 at 04:36:04PM +0000, sashiko-bot@kernel.org wrote:
[...]
> > + /*
> > + * For A32 and A64, exception calls execute a four-byte SVC, HVC or
> > + * SMC and save the following PC. Other exceptions use the interrupted
> > + * or faulting PC, including traps on those instructions.
> > + *
> > + * With a shared branch target, no instruction has completed
> > + * at the target, so last_instr_size remains zero.
> > + */
> > + if (elem->exception_number == CS_ETMV4_EXC_CALL)
>
> [Severity: Medium]
> Does cs_etm_decoder__buffer_exception() miscalculate the instruction size for
> ETMv3 SVC and HYP call exceptions here?
It's possible. In practice, we don't have any known perf users relying
on ETMv3 support. I'd prefer to leave the code as is rather than
introduce additional complexity.
next prev parent reply other threads:[~2026-10-30 11:12 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-23 15:21 [PATCH v2 00/14] perf cs-etm: Fix bogus branch samples on exceptions Leo Yan
2026-09-23 15:21 ` [PATCH v2 01/14] perf sample: Allow decoders to supply branch return addresses Leo Yan
2026-09-23 15:29 ` sashiko-bot
2026-09-24 13:00 ` Adrian Hunter
2026-09-23 15:21 ` [PATCH v2 02/14] perf intel-pt: Preserve return addresses for asynchronous branches Leo Yan
2026-09-23 15:43 ` sashiko-bot
2026-09-24 13:00 ` Adrian Hunter
2026-09-23 15:21 ` [PATCH v2 03/14] perf cs-etm: Break branch history when instruction memory is unavailable Leo Yan
2026-09-23 15:46 ` sashiko-bot
2026-09-23 15:21 ` [PATCH v2 04/14] perf cs-etm: Centralize packet ISA initialization Leo Yan
2026-09-23 15:50 ` sashiko-bot
2026-09-23 15:21 ` [PATCH v2 05/14] perf cs-etm: Use the recorded instruction size for A32 and A64 Leo Yan
2026-09-23 16:01 ` sashiko-bot
2026-09-29 13:55 ` James Clark
2026-10-29 16:28 ` Leo Yan
2026-09-23 15:21 ` [PATCH v2 06/14] perf cs-etm: Mark branches that were not taken Leo Yan
2026-09-23 16:09 ` sashiko-bot
2026-09-23 15:21 ` [PATCH v2 07/14] perf cs-etm: Factor out final instruction sample synthesis Leo Yan
2026-09-23 16:13 ` sashiko-bot
2026-09-23 15:21 ` [PATCH v2 08/14] perf cs-etm: Centralize branch sample synthesis checks Leo Yan
2026-09-23 16:18 ` sashiko-bot
2026-09-23 15:21 ` [PATCH v2 09/14] perf cs-etm: Classify exception calls using the exception packet Leo Yan
2026-09-23 16:24 ` sashiko-bot
2026-09-29 14:08 ` James Clark
2026-10-29 17:41 ` Leo Yan
2026-09-23 15:21 ` [PATCH v2 10/14] perf cs-etm: Synthesize exception entries separately from branches Leo Yan
2026-09-23 16:36 ` sashiko-bot
2026-10-30 11:12 ` Leo Yan [this message]
2026-09-23 15:21 ` [PATCH v2 11/14] perf tests: Check CoreSight IRQ entry and exit Leo Yan
2026-09-23 16:40 ` sashiko-bot
2026-09-29 12:22 ` James Clark
2026-10-29 18:03 ` Leo Yan
2026-09-23 15:21 ` [PATCH v2 12/14] perf tests: Check CoreSight syscall " Leo Yan
2026-09-23 16:46 ` sashiko-bot
2026-09-23 15:21 ` [PATCH v2 13/14] perf tests: Check CoreSight abort " Leo Yan
2026-09-23 16:49 ` sashiko-bot
2026-09-23 15:21 ` [PATCH v2 14/14] perf tests: Check CoreSight emulated instruction " Leo Yan
2026-09-23 16:56 ` sashiko-bot
2026-09-29 14:41 ` [PATCH v2 00/14] perf cs-etm: Fix bogus branch samples on exceptions James Clark
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