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Sat, 31 Oct 2026 07:51:53 -0700 (PDT) Received: from ubuntu.lan ([2405:4802:913e:86f0:fc32:76b2:b6d6:a3f6]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36a428c17bdsm17541006eec.6.2026.10.31.07.51.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Oct 2026 07:51:53 -0700 (PDT) From: Khai Do To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, peter.maydell@linaro.org, pbonzini@redhat.com, strahinja.p.jankovic@gmail.com, Khai Do Subject: [PATCH 0/5] hw/arm: Add Allwinner H618 SoC and Orange Pi Zero 2W machine Date: Sat, 31 Oct 2026 21:51:42 +0700 Message-ID: <20261031145147.32683-1-dovankhai97@gmail.com> X-Mailer: git-send-email 2.43.0 X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1333; envelope-from=dovankhai97@gmail.com; helo=mail-dy1-x1333.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Sat, 31 Oct 2026 10:57:53 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org X-Spam-Status: No, score=-10.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_PASS,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 This patch series adds emulation support for the Allwinner H618 SoC and the Orange Pi Zero 2W single-board computer (SBC). The Allwinner H618 is a quad-core 64-bit ARM Cortex-A53 SoC. This series follows the incremental skeleton design established for Allwinner SoCs: - Patch 1: Introduces the basic H618 SoC model with 4x Cortex-A53 cores, GICv2, ARM Generic Timer PPIs, UART0/1, SRAM A1/A2, and stubbed unimp MMIO. - Patch 2: Adds the Orange Pi Zero 2W machine with 1 GiB SDRAM and kernel loader. - Patch 3: Separates the ALLWINNER_SID Kconfig symbol so other SoCs can reuse it. - Patch 4: Extends the Allwinner SID eFuse controller to support configurable capacity up to 512 bytes (required by H618), preserving backward compatibility. - Patch 5: Connects the SID controller into the H618 SoC and sets the default UID. Verification: - The series has been tested using Zephyr RTOS (v4.5) running on the orangepi-zero2w target, verifying UART0 output, multi-threading with ARM Generic Timer (k_msleep), HWINFO UID reading, and SID OTP (512B capacity). - All patches pass ./scripts/checkpatch.pl with 0 errors and 0 warnings. Khai Do (5): hw/arm/allwinner-h618: Add Allwinner H618 SoC emulation hw/arm/orangepi-zero2w: Add Orange Pi Zero 2W machine hw/misc/allwinner-sid: Separate ALLWINNER_SID config symbol hw/misc/allwinner-sid: Support configurable eFuse capacity up to 512 bytes hw/arm/allwinner-h618: Connect Allwinner SID controller MAINTAINERS | 8 ++ hw/arm/Kconfig | 9 ++ hw/arm/allwinner-h618.c | 233 ++++++++++++++++++++++++++++++++ hw/arm/meson.build | 1 + hw/arm/orangepi-zero2w.c | 85 ++++++++++++ hw/misc/Kconfig | 3 + hw/misc/allwinner-sid.c | 8 +- hw/misc/meson.build | 2 +- include/hw/arm/allwinner-h618.h | 60 ++++++++ include/hw/misc/allwinner-sid.h | 8 ++ 10 files changed, 415 insertions(+), 2 deletions(-) create mode 100644 hw/arm/allwinner-h618.c create mode 100644 hw/arm/orangepi-zero2w.c create mode 100644 include/hw/arm/allwinner-h618.h -- 2.43.0