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Sun, 01 Nov 2026 11:29:41 -0800 (PST) Received: from server.lan ([168.138.199.194]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36a428af1dfsm31471861eec.7.2026.11.01.11.29.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Nov 2026 11:29:41 -0800 (PST) From: Coia Prant To: Heiko Stuebner Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Frank Wunderlich , Peter Geis , Junhao Xie , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Coia Prant Subject: [PATCH 2/5] arm64: dts: rockchip: fix GMAC clock parents on Graperain G3568 v2 Date: Mon, 2 Nov 2026 03:28:04 +0800 Message-ID: <20261101192807.897562-3-coiaprant@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20261101192807.897562-1-coiaprant@gmail.com> References: <20261101192807.897562-1-coiaprant@gmail.com> X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Both GMAC nodes list SCLK_GMACx in assigned-clocks, but only SCLK_GMACx_RX_TX gets a parent in assigned-clock-parents. SCLK_GMACx therefore keeps whatever parent the bootloader or the hardware reset left, which may or may not be the internal CLK_MACx_2TOP. Add CLK_MACx_2TOP as the parent of SCLK_GMACx explicitly, so the GMAC main clock always comes from the internal clock source and does not depend on the bootloader state. The rate assignment is unchanged: SCLK_GMACx_RX_TX stays at 0 (managed at runtime by rk_set_clk_tx_rate()), SCLK_GMACx stays at 125 MHz. Fixes: f296bb503a24 ("arm64: dts: rockchip: Add devicetree for the Graperain G3568 v2") Signed-off-by: Coia Prant --- arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts b/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts index 4c55c7d211599..07cfc68b5f91b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts @@ -280,7 +280,7 @@ &cpu3 { &gmac0 { assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; assigned-clock-rates = <0>, <125000000>; clock_in_out = "output"; pinctrl-names = "default"; @@ -296,7 +296,7 @@ &gmac0_rgmii_clk &gmac1 { assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; 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Sun, 01 Nov 2026 11:29:41 -0800 (PST) Received: from server.lan ([168.138.199.194]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36a428af1dfsm31471861eec.7.2026.11.01.11.29.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Nov 2026 11:29:41 -0800 (PST) From: Coia Prant To: Heiko Stuebner Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Frank Wunderlich , Peter Geis , Junhao Xie , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Coia Prant Subject: [PATCH 2/5] arm64: dts: rockchip: fix GMAC clock parents on Graperain G3568 v2 Date: Mon, 2 Nov 2026 03:28:04 +0800 Message-ID: <20261101192807.897562-3-coiaprant@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20261101192807.897562-1-coiaprant@gmail.com> References: <20261101192807.897562-1-coiaprant@gmail.com> X-Archived-By: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261101_112942_354522_BFF29827 X-CRM114-Status: GOOD ( 12.89 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Both GMAC nodes list SCLK_GMACx in assigned-clocks, but only SCLK_GMACx_RX_TX gets a parent in assigned-clock-parents. SCLK_GMACx therefore keeps whatever parent the bootloader or the hardware reset left, which may or may not be the internal CLK_MACx_2TOP. Add CLK_MACx_2TOP as the parent of SCLK_GMACx explicitly, so the GMAC main clock always comes from the internal clock source and does not depend on the bootloader state. The rate assignment is unchanged: SCLK_GMACx_RX_TX stays at 0 (managed at runtime by rk_set_clk_tx_rate()), SCLK_GMACx stays at 125 MHz. Fixes: f296bb503a24 ("arm64: dts: rockchip: Add devicetree for the Graperain G3568 v2") Signed-off-by: Coia Prant --- arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts b/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts index 4c55c7d211599..07cfc68b5f91b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts @@ -280,7 +280,7 @@ &cpu3 { &gmac0 { assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; assigned-clock-rates = <0>, <125000000>; clock_in_out = "output"; pinctrl-names = "default"; @@ -296,7 +296,7 @@ &gmac0_rgmii_clk &gmac1 { assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; assigned-clock-rates = <0>, <125000000>; clock_in_out = "output"; pinctrl-names = "default"; -- 2.47.3 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip