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Wed, 4 Nov 2026 18:23:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1793816626; bh=vXyx2T4UR72mVWVvmoBUBv3HGxL71fOOQ94CZu64Cro=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=JI9ehEr8eTuaXJxJTip0PDNwG3c0pChwMKgzIFOscNO5pB7vuyVqWXYs+GPAG+qLG i/HRTxSBY5PWQjj8DITE/tGEaB/D8AxMnWFX9nRe29phuP4ZivWxY5DXN/utwkDg5v W1Hl2zrAX5jeCSPjAVh9xg/GisHWFS2P6ctGF/raCKG4kvJdWGBupgfpIwc2aMmwNJ AXvNmZueQ0ggXlJ68dmpO2T7+rWb6UOFOq17Svt9ECcd6T6DIqDrj13ay8sXul9kpy NF3EFQqGdYI7sPu5fvsn/3FjL7CWYX0iqf16Tjw8ZAwOS0D66cScfdwqND++PaGzWC s9hIFyyBtDimA== Date: Wed, 4 Nov 2026 18:23:42 +0000 From: Lee Jones To: Vince Chang Cc: openbmc@lists.ozlabs.org, andrew@codeconstruct.com.au, tan.siewert@9elements.com, Billy Tsai , joel@jms.id.au, Rob Herring , Linus Walleij Subject: Re: [PATCH linux dev-6.18 2/3] dt-bindings: mfd: aspeed,ast2x00-scu: Describe AST2700 SCU0 Message-ID: <20261104182342.GF1650678@google.com> References: <20261029031552.515601-1-vince_chang@aspeedtech.com> <20261029031552.515601-3-vince_chang@aspeedtech.com> X-Mailing-List: openbmc@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Subscribe: , , Precedence: list X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261029031552.515601-3-vince_chang@aspeedtech.com> X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On Thu, 29 Oct 2026, Vince Chang wrote: > From: Billy Tsai > > AST2700 consists of two interconnected SoC instances, each with its own > System Control Unit (SCU). The SCU0 provides pin control, interrupt > controllers, clocks, resets, and address-space mappings for the > Secondary and Tertiary Service Processors (SSP and TSP). > > Describe the SSP/TSP address mappings using the standard > memory-region and memory-region-names properties. > > Disallow legacy child nodes that are not present on AST2700, including > p2a-control and smp-memram. The latter is unnecessary as software can > access the scratch registers via the SCU syscon. > > Also allow the AST2700 SoC0 pin controller to be described as a child > node of the SCU0, and add an example illustrating the SCU0 layout, > including reserved-memory, interrupt controllers, and pinctrl. > > Signed-off-by: Billy Tsai > Reviewed-by: Rob Herring (Arm) > Acked-by: Linus Walleij > Link: https://patch.msgid.link/20260428-upstream_pinctrl-v8-2-eb8ef9ab0498@aspeedtech.com > Signed-off-by: Lee Jones > (cherry picked from commit 2611c4d623ba867e196a4146f1927c3c468ac2bc) > Signed-off-by: Vince Chang > --- > .../bindings/mfd/aspeed,ast2x00-scu.yaml | 114 ++++++++++++++++++ > 1 file changed, 114 insertions(+) What is this? Why are you sending downstream patches to upstream contributors? Please check your `git send-email` settings. -- Lee Jones