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[2.155.41.158]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4b56f5e65b0sm15526735e9.11.2026.11.04.13.58.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Nov 2026 13:58:52 -0800 (PST) From: =?UTF-8?q?Enrique=20Hern=C3=A1ndez=20Bello?= To: shawn.lin@rock-chips.com, lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org, bhelgaas@google.com Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, dlemoal@kernel.org, iav@iav.lv, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Enrique=20Hern=C3=A1ndez=20Bello?= Subject: [PATCH v5 1/2] dt-bindings: PCI: rockchip,rk3399-pcie: Add PERST# inactive delay properties Date: Wed, 4 Nov 2026 21:58:46 +0000 Message-ID: <20261104215848.2087944-2-ehbello@gmail.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261104215848.2087944-1-ehbello@gmail.com> References: <20261104215848.2087944-1-ehbello@gmail.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261104_215855_658004_E9DB3100 X-CRM114-Status: GOOD ( 13.07 ) X-Spam-Score: -0.2 (/) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 The driver holds PERST# asserted for T_PVPERL (100 ms) before releasing it. Endpoints disagree about what they want there: some need longer than the default to settle, while others stop answering configuration reads when the reset pulse is stretched that far, because PERST# stays asserted for the whole wait. Describe two properties so a board can state what its endpoint needs, named after the ones the Rockchip vendor driver already uses for the dwc-based controllers: rockchip,perst-inactive-ms - the delay used at probe rockchip,s2r-perst-inactive-ms - the delay used when resuming Both are optional and the defaults preserve the current behaviour. Signed-off-by: Enrique Hernández Bello --- .../bindings/pci/rockchip,rk3399-pcie.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml index 720a5f9..7ac915c 100644 --- a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml @@ -40,6 +40,21 @@ properties: maxItems: 1 description: pre-reset GPIO + rockchip,perst-inactive-ms: + default: 100 + description: + Time PERST# is held asserted before it is released, which is also the + width of the reset pulse. The default meets T_PVPERL for a slot that + is powered at the moment PERST# is asserted. Some endpoints need more + settling time than that, while others stop responding when the pulse + is that long. A value of 0 selects the 100 us minimum the PCI Express + CEM specification sets for the pulse. + + rockchip,s2r-perst-inactive-ms: + description: + The same time, applied when resuming from system suspend. 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[2.155.41.158]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4b56f5e65b0sm15526735e9.11.2026.11.04.13.58.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Nov 2026 13:58:52 -0800 (PST) From: =?UTF-8?q?Enrique=20Hern=C3=A1ndez=20Bello?= To: shawn.lin@rock-chips.com, lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org, bhelgaas@google.com Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, dlemoal@kernel.org, iav@iav.lv, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Enrique=20Hern=C3=A1ndez=20Bello?= Subject: [PATCH v5 1/2] dt-bindings: PCI: rockchip,rk3399-pcie: Add PERST# inactive delay properties Date: Wed, 4 Nov 2026 21:58:46 +0000 Message-ID: <20261104215848.2087944-2-ehbello@gmail.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261104215848.2087944-1-ehbello@gmail.com> References: <20261104215848.2087944-1-ehbello@gmail.com> X-Archived-By: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261104_215855_664716_1F8B4F86 X-CRM114-Status: GOOD ( 11.76 ) X-Spam-Score: -0.2 (/) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "Linux-rockchip" X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 VGhlIGRyaXZlciBob2xkcyBQRVJTVCMgYXNzZXJ0ZWQgZm9yIFRfUFZQRVJMICgxMDAgbXMpIGJl Zm9yZSByZWxlYXNpbmcgaXQuCkVuZHBvaW50cyBkaXNhZ3JlZSBhYm91dCB3aGF0IHRoZXkgd2Fu dCB0aGVyZTogc29tZSBuZWVkIGxvbmdlciB0aGFuIHRoZQpkZWZhdWx0IHRvIHNldHRsZSwgd2hp bGUgb3RoZXJzIHN0b3AgYW5zd2VyaW5nIGNvbmZpZ3VyYXRpb24gcmVhZHMgd2hlbiB0aGUKcmVz ZXQgcHVsc2UgaXMgc3RyZXRjaGVkIHRoYXQgZmFyLCBiZWNhdXNlIFBFUlNUIyBzdGF5cyBhc3Nl cnRlZCBmb3IgdGhlCndob2xlIHdhaXQuCgpEZXNjcmliZSB0d28gcHJvcGVydGllcyBzbyBhIGJv YXJkIGNhbiBzdGF0ZSB3aGF0IGl0cyBlbmRwb2ludCBuZWVkcywgbmFtZWQKYWZ0ZXIgdGhlIG9u ZXMgdGhlIFJvY2tjaGlwIHZlbmRvciBkcml2ZXIgYWxyZWFkeSB1c2VzIGZvciB0aGUgZHdjLWJh c2VkCmNvbnRyb2xsZXJzOgoKICByb2NrY2hpcCxwZXJzdC1pbmFjdGl2ZS1tcyAgICAgIC0gdGhl IGRlbGF5IHVzZWQgYXQgcHJvYmUKICByb2NrY2hpcCxzMnItcGVyc3QtaW5hY3RpdmUtbXMgIC0g dGhlIGRlbGF5IHVzZWQgd2hlbiByZXN1bWluZwoKQm90aCBhcmUgb3B0aW9uYWwgYW5kIHRoZSBk ZWZhdWx0cyBwcmVzZXJ2ZSB0aGUgY3VycmVudCBiZWhhdmlvdXIuCgpTaWduZWQtb2ZmLWJ5OiBF bnJpcXVlIEhlcm7DoW5kZXogQmVsbG8gPGVoYmVsbG9AZ21haWwuY29tPgotLS0KIC4uLi9iaW5k aW5ncy9wY2kvcm9ja2NoaXAscmszMzk5LXBjaWUueWFtbCAgICAgICAgfCAxNSArKysrKysrKysr KysrKysKIDEgZmlsZSBjaGFuZ2VkLCAxNSBpbnNlcnRpb25zKCspCgpkaWZmIC0tZ2l0IGEvRG9j dW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL3BjaS9yb2NrY2hpcCxyazMzOTktcGNpZS55 YW1sIGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL3BjaS9yb2NrY2hpcCxyazMz OTktcGNpZS55YW1sCmluZGV4IDcyMGE1ZjkuLjdhYzkxNWMgMTAwNjQ0Ci0tLSBhL0RvY3VtZW50 YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9wY2kvcm9ja2NoaXAscmszMzk5LXBjaWUueWFtbAor KysgYi9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvcGNpL3JvY2tjaGlwLHJrMzM5 OS1wY2llLnlhbWwKQEAgLTQwLDYgKzQwLDIxIEBAIHByb3BlcnRpZXM6CiAgICAgbWF4SXRlbXM6 IDEKICAgICBkZXNjcmlwdGlvbjogcHJlLXJlc2V0IEdQSU8KIAorICByb2NrY2hpcCxwZXJzdC1p bmFjdGl2ZS1tczoKKyAgICBkZWZhdWx0OiAxMDAKKyAgICBkZXNjcmlwdGlvbjoKKyAgICAgIFRp bWUgUEVSU1QjIGlzIGhlbGQgYXNzZXJ0ZWQgYmVmb3JlIGl0IGlzIHJlbGVhc2VkLCB3aGljaCBp cyBhbHNvIHRoZQorICAgICAgd2lkdGggb2YgdGhlIHJlc2V0IHB1bHNlLiBUaGUgZGVmYXVsdCBt ZWV0cyBUX1BWUEVSTCBmb3IgYSBzbG90IHRoYXQKKyAgICAgIGlzIHBvd2VyZWQgYXQgdGhlIG1v bWVudCBQRVJTVCMgaXMgYXNzZXJ0ZWQuIFNvbWUgZW5kcG9pbnRzIG5lZWQgbW9yZQorICAgICAg c2V0dGxpbmcgdGltZSB0aGFuIHRoYXQsIHdoaWxlIG90aGVycyBzdG9wIHJlc3BvbmRpbmcgd2hl biB0aGUgcHVsc2UKKyAgICAgIGlzIHRoYXQgbG9uZy4gQSB2YWx1ZSBvZiAwIHNlbGVjdHMgdGhl IDEwMCB1cyBtaW5pbXVtIHRoZSBQQ0kgRXhwcmVzcworICAgICAgQ0VNIHNwZWNpZmljYXRpb24g c2V0cyBmb3IgdGhlIHB1bHNlLgorCisgIHJvY2tjaGlwLHMyci1wZXJzdC1pbmFjdGl2ZS1tczoK KyAgICBkZXNjcmlwdGlvbjoKKyAgICAgIFRoZSBzYW1lIHRpbWUsIGFwcGxpZWQgd2hlbiByZXN1 bWluZyBmcm9tIHN5c3RlbSBzdXNwZW5kLiBEZWZhdWx0cyB0bworICAgICAgdGhlIHZhbHVlIG9m IHJvY2tjaGlwLHBlcnN0LWluYWN0aXZlLW1zLgorCiAgIHZwY2llMTJ2LXN1cHBseToKICAgICBk ZXNjcmlwdGlvbjogVGhlIDEydiByZWd1bGF0b3IgdG8gdXNlIGZvciBQQ0llLgogCi0tIAoyLjU2 LjAKCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpMaW51 eC1yb2NrY2hpcCBtYWlsaW5nIGxpc3QKTGludXgtcm9ja2NoaXBAbGlzdHMuaW5mcmFkZWFkLm9y ZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LXJvY2tj aGlwCg==