From: Jacob Pan <jacob.pan@linux.microsoft.com>
To: Jason Gunthorpe <jgg@ziepe.ca>
Cc: "Aneesh Kumar K.V (Arm)" <aneesh.kumar@kernel.org>,
iommu@lists.linux.dev, Alex Williamson <alex@shazbot.org>,
Alexey Kardashevskiy <aik@amd.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Joerg Roedel <joro@8bytes.org>,
Jonathan Cameron <jic23@kernel.org>,
Jonathan Hunter <jonathanh@nvidia.com>,
Kevin Tian <kevin.tian@intel.com>,
Krishna Reddy <vdumpa@nvidia.com>, Lukas Wunner <lukas@wunner.de>,
Nicolin Chen <nicolinc@nvidia.com>,
Robin Murphy <robin.murphy@arm.com>,
Samuel Ortiz <sameo@rivosinc.com>,
Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>,
Steven Price <steven.price@arm.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Thierry Reding <thierry.reding@kernel.org>,
Vasant Hegde <vasant.hegde@amd.com>,
Will Deacon <will@kernel.org>,
Xu Yilun <yilun.xu@linux.intel.com>,
kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, linux-tegra@vger.kernel.org,
jacob.pan@linux.microsoft.com
Subject: Re: [PATCH v8 12/15] iommufd/viommu: Allow PCI TSM backends to provide vIOMMU operations
Date: Thu, 5 Nov 2026 09:16:22 -0800 [thread overview]
Message-ID: <20261105091622.00004a9c@linux.microsoft.com> (raw)
In-Reply-To: <20261105004934.GE3889730@ziepe.ca>
Hi Jason,
On Wed, 4 Nov 2026 20:49:34 -0400
Jason Gunthorpe <jgg@ziepe.ca> wrote:
> On Wed, Nov 04, 2026 at 03:23:51PM -0800, Jacob Pan wrote:
>
> > I am thinking MSHV/pKVM can register an assignment-only tsm_dev to
> > leverage this? Could PCI/TSM support this role without
> > device-security?
>
> It is certainly not what TSM was originally imagined for, but with our
> new arrangement, yah maybe so?
I will rebase on this set and send out patches for a detailed review.
> TSM basically just becomes this weird overlay driver on the PCI device
> that does stuff. Some of the stuff it might do:
> - Register an attestation subsystem device to do SPDM
> - Register to allow iommufd to create a viommu
> - Some status sysfs ?
> - ??
>
So we may expand pci tsm to have more than one role? currently it has
one.
int pci_tsm_register(struct tsm_dev *tsm_dev) {
...
roles = is_link_tsm(tsm_dev) + is_devsec_tsm(tsm_dev) +
is_assignment_tsm(tsm_dev);
if (roles != 1)
return -EINVAL;
> It all seems separable and composable to me, so if you don't want to
> launch an attestation subsystem device because there is no SPDM then I
> think that might be OK?
>
> Another option would be to somehow obtain the viommu from the kvm file
> descriptor and rely on the fd to handle the module pinning/etc. I
> don't know how to do that nicely with the way the modules work
> though..
I did this in mshv-iommufd RFC to associate hypervisor FD file to
viommu.
VMM:
struct iommu_viommu_hypervisor hypervisor = {
.vm_fd = vm_fd,
};
struct iommu_viommu_alloc alloc = {
.size = sizeof(alloc),
.type = IOMMU_VIOMMU_TYPE_HYPERVISOR,
.dev_id = dev_id,
.data_len = sizeof(hypervisor),
.data_uptr = (uintptr_t)&hypervisor,
};
rc = do_ioctl(iommufd, IOMMU_VIOMMU_ALLOC, &alloc,
"IOMMU_VIOMMU_ALLOC");
Since mshv creates partition file with anon_inode_getfile() which does a
try_module_get(fops->owner), then in mshv_viommu_init, it does
fget(hypervisor.vm_fd) which will indirectly keep the module pinned.
I guess we have to enforce this pattern to make it universally viable?
Thanks,
Jacob
next prev parent reply other threads:[~2026-11-05 17:16 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-04 16:16 [PATCH v8 00/15] iommufd: TSM-backed virtual IOMMUs for confidential guests Aneesh Kumar K.V (Arm)
2026-11-04 16:16 ` [PATCH v8 01/15] PCI/TSM: Move core code into its own directory Aneesh Kumar K.V (Arm)
2026-11-04 16:23 ` sashiko-bot
2026-11-05 12:24 ` kernel test robot
2026-11-04 16:16 ` [PATCH v8 02/15] virt: coco: tsm: Remove the device from lookup before PCI teardown Aneesh Kumar K.V (Arm)
2026-11-04 16:27 ` sashiko-bot
2026-11-04 16:16 ` [PATCH v8 03/15] virt: coco: tsm: Complete PCI registration before publishing the device Aneesh Kumar K.V (Arm)
2026-11-04 16:32 ` sashiko-bot
2026-11-04 16:16 ` [PATCH v8 04/15] virt: coco: tsm: Require PCI operations when registering a TSM Aneesh Kumar K.V (Arm)
2026-11-04 16:36 ` sashiko-bot
2026-11-04 16:16 ` [PATCH v8 05/15] iommufd/device: Associate KVM file pointer with iommufd_device Aneesh Kumar K.V (Arm)
2026-11-04 16:40 ` sashiko-bot
2026-11-04 16:16 ` [PATCH v8 06/15] iommufd/device: Hold a KVM file reference for the device lifetime Aneesh Kumar K.V (Arm)
2026-11-04 16:43 ` sashiko-bot
2026-11-04 16:16 ` [PATCH v8 07/15] iommufd/viommu: Keep a reference to the KVM file Aneesh Kumar K.V (Arm)
2026-11-04 16:35 ` Jacob Pan
2026-11-04 16:46 ` sashiko-bot
2026-11-04 16:16 ` [PATCH v8 08/15] iommufd: Add a vDEVICE operation ioctl framework Aneesh Kumar K.V (Arm)
2026-11-04 16:54 ` sashiko-bot
2026-11-04 16:16 ` [PATCH v8 09/15] PCI/TSM: Remove the legacy guest request interface Aneesh Kumar K.V (Arm)
2026-11-04 16:56 ` sashiko-bot
2026-11-04 16:16 ` [PATCH v8 10/15] PCI/TSM: Add vIOMMU-bound device contexts Aneesh Kumar K.V (Arm)
2026-11-04 17:07 ` sashiko-bot
2026-11-04 16:16 ` [PATCH v8 11/15] iommufd/viommu: Select vIOMMU operations before allocation Aneesh Kumar K.V (Arm)
2026-11-04 17:14 ` sashiko-bot
2026-11-05 9:10 ` kernel test robot
2026-11-05 14:49 ` kernel test robot
2026-11-04 16:16 ` [PATCH v8 12/15] iommufd/viommu: Allow PCI TSM backends to provide vIOMMU operations Aneesh Kumar K.V (Arm)
2026-11-04 17:19 ` sashiko-bot
2026-11-04 23:23 ` Jacob Pan
2026-11-05 0:49 ` Jason Gunthorpe
2026-11-05 17:16 ` Jacob Pan [this message]
2026-11-04 16:16 ` [PATCH v8 13/15] iommufd/viommu: Allow vIOMMUs without a parent HWPT Aneesh Kumar K.V (Arm)
2026-11-04 17:25 ` sashiko-bot
2026-11-04 19:03 ` Nicolin Chen
2026-11-04 19:31 ` Jason Gunthorpe
2026-11-05 5:28 ` Aneesh Kumar K.V
2026-11-05 17:44 ` Nicolin Chen
2026-11-04 16:16 ` [PATCH v8 14/15] PCI/TSM: Wait for device contexts before removing a DSM Aneesh Kumar K.V (Arm)
2026-11-04 17:41 ` sashiko-bot
2026-11-04 16:16 ` [PATCH v8 15/15] PCI/TSM: Wait for users during unregister Aneesh Kumar K.V (Arm)
2026-11-04 18:00 ` sashiko-bot
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