All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ankit Agrawal <ankita@nvidia.com>
To: <linux-cxl@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Cc: <dave@stgolabs.net>, <jic23@kernel.org>, <dave.jiang@intel.com>,
	<alison.schofield@intel.com>, <vishal.l.verma@intel.com>,
	<jgg@nvidia.com>, <aneesh.kumar@kernel.org>, <aik@amd.com>,
	<yilun.xu@linux.intel.com>, <iweiny@kernel.org>,
	<ming.li@zohomail.com>, <icheng@nvidia.com>,
	<bhelgaas@google.com>, <smadhavan@nvidia.com>,
	<ankita@nvidia.com>, <ilpo.jarvinen@linux.intel.com>,
	<Smita.KoralahalliChannabasappa@amd.com>,
	<andriy.shevchenko@linux.intel.com>, <linux-coco@lists.linux.dev>,
	<terry.bowman@amd.com>, <nik.borisov@suse.com>,
	<brads@mainlining.org>, <lukas@wunner.de>, <rrichter@amd.com>,
	<gourry@gourry.net>
Subject: [RFC PATCH v2 5/5] cxl: Invalidate cached coherent range when Normalized Addressing is detected
Date: Thu, 5 Nov 2026 15:29:09 +0000	[thread overview]
Message-ID: <20261105152909.53452-6-ankita@nvidia.com> (raw)
In-Reply-To: <20261105152909.53452-1-ankita@nvidia.com>

In case of Normalized addressing, the HDM decoders report DPA instead
of HPA. Determine such case and ensure the pdev->coh_resource[] do not
cache it.

CXL_DECODER_F_NORMALIZED_ADDRESSING is only set on a decoder once the
endpoint is assembled into a region in cxl_prm_setup_root(). This is
well after the HDM decoders are snapshotted and populated in
pdev->coh_resource[]. So the DPA would be populated in the
pdev->coh_resource.

Add pci_cxl_hdm_coh_invalidate() and call it later when the normalized
addressing is identified to clear the cached value.

Signed-off-by: Ankit Agrawal <ankita@nvidia.com>
---
 drivers/cxl/core/atl.c      |  6 ++++++
 drivers/cxl/core/core.h     |  9 +++++++++
 drivers/cxl/core/resource.c | 32 ++++++++++++++++++++++++++++++++
 3 files changed, 47 insertions(+)

diff --git a/drivers/cxl/core/atl.c b/drivers/cxl/core/atl.c
index 07ce7c50c47a..2bf4d73fd02f 100644
--- a/drivers/cxl/core/atl.c
+++ b/drivers/cxl/core/atl.c
@@ -175,6 +175,12 @@ static int cxl_prm_setup_root(struct cxl_root *cxl_root, void *data)
 	cxld->config.flags |= CXL_DECODER_F_LOCK;
 	cxld->config.flags |= CXL_DECODER_F_NORMALIZED_ADDRESSING;
 
+	/*
+	 * The PCI-core snapshot of this decoder was taken before the flag was
+	 * known. Invalidate it so a DPA is never exposed as a coherent HPA.
+	 */
+	pci_cxl_hdm_coh_invalidate(pci_dev, cxld->config.id);
+
 	ctx->hpa_range = hpa_range;
 	ctx->interleave_ways = ways;
 	ctx->interleave_granularity = gran;
diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h
index 1aabbbb4ae5e..97d27a27ab67 100644
--- a/drivers/cxl/core/core.h
+++ b/drivers/cxl/core/core.h
@@ -139,6 +139,15 @@ struct cxl_rwsem {
 
 extern struct cxl_rwsem cxl_rwsem;
 
+#ifdef CONFIG_CXL_RESET
+void pci_cxl_hdm_coh_invalidate(struct pci_dev *pdev, int decoder_id);
+#else
+static inline void pci_cxl_hdm_coh_invalidate(struct pci_dev *pdev,
+					      int decoder_id)
+{
+}
+#endif
+
 void cxl_commit_start(void __iomem *hdm, struct cxl_decoder_settings *settings);
 int cxld_await_commit(void __iomem *hdm, int id);
 
diff --git a/drivers/cxl/core/resource.c b/drivers/cxl/core/resource.c
index d837f8e952a9..d0774926da2d 100644
--- a/drivers/cxl/core/resource.c
+++ b/drivers/cxl/core/resource.c
@@ -527,6 +527,38 @@ void pci_cxl_hdm_cache_release(struct pci_dev *pdev)
 	kfree(info);
 }
 
+/*
+ * A decoder is found to use Normalized Addressing only once the endpoint is
+ * assembled into a region, after the snapshot. Record the flag in the cached
+ * settings and drop the coherent range so a DPA is never reported as an HPA.
+ */
+void pci_cxl_hdm_coh_invalidate(struct pci_dev *pdev, int decoder_id)
+{
+	struct cxl_hdm_info *info;
+	struct resource *res;
+
+	guard(rwsem_write)(&cxl_rwsem.dpa);
+	info = pdev->hdm;
+	if (!info || decoder_id < 0 || decoder_id >= info->decoder_count)
+		return;
+
+	info->settings[decoder_id].config.flags |=
+		CXL_DECODER_F_NORMALIZED_ADDRESSING;
+
+	if (decoder_id >= PCI_CXL_MAX_COHERENT_RANGES)
+		return;
+
+	res = &pdev->coh_resource[decoder_id];
+	if (!res->flags)
+		return;
+
+	pci_warn(pdev, "CXL coherent range: decoder%d uses Normalized Addressing, dropping %pR\n",
+		 decoder_id, res);
+	if (res->parent)
+		remove_resource(res);
+	memset(res, 0, sizeof(*res));
+}
+
 static void __iomem *cxl_pci_hdm_ioremap_current(struct pci_dev *pdev,
 						 int bar,
 						 resource_size_t offset,
-- 
2.53.0


  parent reply	other threads:[~2026-11-05 15:29 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-05 15:29 [RFC PATCH v2 0/5] PCI/TSM: Resolve TDISP coherent (CXL) ranges from precommitted HDM decoders Ankit Agrawal
2026-11-05 15:29 ` [RFC PATCH v2 1/5] PCI/TSM: Create MMIO descriptors via TDISP Report Ankit Agrawal
2026-11-05 15:29 ` [RFC PATCH v2 2/5] PCI/CXL: Populate and insert/remove pdev->coh_resource[] Ankit Agrawal
2026-11-05 15:29 ` [RFC PATCH v2 3/5] PCI/TSM: Derive the coherent-range IPA from CXL Ankit Agrawal
2026-11-06 10:06   ` Richard Cheng
2026-11-06 12:16     ` Ankit Agrawal
2026-11-06 12:38       ` Ankit Agrawal
2026-11-06 14:26         ` Jason Gunthorpe
2026-11-05 15:29 ` [RFC PATCH v2 4/5] PCI/TSM: Support multiple coherent ranges via coh_idx Ankit Agrawal
2026-11-05 15:29 ` Ankit Agrawal [this message]
2026-11-06 10:19   ` [RFC PATCH v2 5/5] cxl: Invalidate cached coherent range when Normalized Addressing is detected Richard Cheng
2026-11-06 12:22     ` Ankit Agrawal

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20261105152909.53452-6-ankita@nvidia.com \
    --to=ankita@nvidia.com \
    --cc=Smita.KoralahalliChannabasappa@amd.com \
    --cc=aik@amd.com \
    --cc=alison.schofield@intel.com \
    --cc=andriy.shevchenko@linux.intel.com \
    --cc=aneesh.kumar@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=brads@mainlining.org \
    --cc=dave.jiang@intel.com \
    --cc=dave@stgolabs.net \
    --cc=gourry@gourry.net \
    --cc=icheng@nvidia.com \
    --cc=ilpo.jarvinen@linux.intel.com \
    --cc=iweiny@kernel.org \
    --cc=jgg@nvidia.com \
    --cc=jic23@kernel.org \
    --cc=linux-coco@lists.linux.dev \
    --cc=linux-cxl@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lukas@wunner.de \
    --cc=ming.li@zohomail.com \
    --cc=nik.borisov@suse.com \
    --cc=rrichter@amd.com \
    --cc=smadhavan@nvidia.com \
    --cc=terry.bowman@amd.com \
    --cc=vishal.l.verma@intel.com \
    --cc=yilun.xu@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.