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Fri, 06 Nov 2026 00:09:15 -0800 (PST) From: Luca Di Maio To: xen-devel@lists.xenproject.org Cc: Luca Di Maio , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Anthony PERARD Subject: [PATCH v2 1/4] VT-d: round IOTLB flush ranges up to an aligned power of two Date: Fri, 6 Nov 2026 09:08:51 +0100 Message-ID: <20261106080859.2285309-2-luca@edera.dev> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261106080859.2285309-1-luca@edera.dev> References: <20261106080859.2285309-1-luca@edera.dev> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1793952556-3AAD8034-83FEFFB8/0/0 X-purgate-type: clean X-purgate-size: 1356 X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Page-selective invalidation takes only aligned power-of-two ranges, so iommu_flush_iotlb() flushes any other range as the whole domain. A later patch flushes one range per group of grant unmaps, which rarely has that shape. Round the range up to the smallest aligned power of two covering it. Orders the IOMMU doesn't support still get a domain-selective flush, and device TLB invalidations use the same range. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: Luca Di Maio --- Changes in v2: - New patch, taking the rounding out of the grant unmap batch (Teddy). --- xen/drivers/passthrough/vtd/iommu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c index b41a1d41c8..faf8255f26 100644 --- a/xen/drivers/passthrough/vtd/iommu.c +++ b/xen/drivers/passthrough/vtd/iommu.c @@ -742,6 +742,10 @@ static int __must_check cf_check iommu_flush_iotlb(struct domain *d, dfn_t dfn, { ASSERT(page_count && !dfn_eq(dfn, INVALID_DFN)); ASSERT(flush_flags); + + /* PSI takes only aligned powers of two: cover the range with one. */ + page_count = 1UL << flsl(dfn_x(dfn) ^ (dfn_x(dfn) + page_count - 1)); + dfn = _dfn(dfn_x(dfn) & ~(page_count - 1)); } /* -- 2.47.3