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Sat, 07 Nov 2026 18:20:16 -0800 (PST) Received: from mparker-home-xcrbr.sjc.aristanetworks.com ([74.123.28.17]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1b3755e936bsm2585693c88.6.2026.11.07.18.20.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Nov 2026 18:20:16 -0800 (PST) From: Matthew Parker To: pratyush@kernel.org, mwalle@kernel.org, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Matthew Parker , Adam Calabrigo Subject: [PATCH] mtd: spi-nor: gigadevice: Add support for GigaDevice GD25B512 Date: Sun, 8 Nov 2026 02:20:11 +0000 Message-ID: <20261108022011.898185-1-mparker@arista.com> X-Mailer: git-send-email 2.51.0 X-Archived-By: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261107_182018_145465_9BF25B4D X-CRM114-Status: GOOD ( 10.28 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" X-Spam-Status: No, score=-16.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Add support for the GigaDevice GD25B512 512Mbit (64 MiB) SPI NOR flash. The chip exposes valid JESD216B SFDP tables including 4-byte address instruction tables, from which geometry and opcodes are discovered. Stateless 4-byte opcodes and status register locking are enabled. Read, write, and erase functionality across the full memory array have been tested on hardware. Cc: stable@vger.kernel.org # v6.1+ Co-developed-by: Adam Calabrigo Signed-off-by: Adam Calabrigo Signed-off-by: Matthew Parker --- drivers/mtd/spi-nor/gigadevice.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c index 6a2e6ebda148..de96cefde516 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -64,6 +64,10 @@ static const struct flash_info gigadevice_nor_parts[] = { .id = SNOR_ID(0xc8, 0x40, 0x19), .name = "gd25q256", .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6, + }, { + .id = SNOR_ID(0xc8, 0x47, 0x1a), + .flags = SPI_NOR_HAS_LOCK, + .fixup_flags = SPI_NOR_4B_OPCODES, }, { .id = SNOR_ID(0xc8, 0x60, 0x16), .name = "gd25lq32", -- 2.51.0 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/ From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; 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Sat, 07 Nov 2026 18:20:16 -0800 (PST) Received: from mparker-home-xcrbr.sjc.aristanetworks.com ([74.123.28.17]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1b3755e936bsm2585693c88.6.2026.11.07.18.20.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Nov 2026 18:20:16 -0800 (PST) From: Matthew Parker To: pratyush@kernel.org, mwalle@kernel.org, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Matthew Parker , Adam Calabrigo Subject: [PATCH] mtd: spi-nor: gigadevice: Add support for GigaDevice GD25B512 Date: Sun, 8 Nov 2026 02:20:11 +0000 Message-ID: <20261108022011.898185-1-mparker@arista.com> X-Mailer: git-send-email 2.51.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add support for the GigaDevice GD25B512 512Mbit (64 MiB) SPI NOR flash. The chip exposes valid JESD216B SFDP tables including 4-byte address instruction tables, from which geometry and opcodes are discovered. Stateless 4-byte opcodes and status register locking are enabled. Read, write, and erase functionality across the full memory array have been tested on hardware. Cc: stable@vger.kernel.org # v6.1+ Co-developed-by: Adam Calabrigo Signed-off-by: Adam Calabrigo Signed-off-by: Matthew Parker --- drivers/mtd/spi-nor/gigadevice.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c index 6a2e6ebda148..de96cefde516 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -64,6 +64,10 @@ static const struct flash_info gigadevice_nor_parts[] = { .id = SNOR_ID(0xc8, 0x40, 0x19), .name = "gd25q256", .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6, + }, { + .id = SNOR_ID(0xc8, 0x47, 0x1a), + .flags = SPI_NOR_HAS_LOCK, + .fixup_flags = SPI_NOR_4B_OPCODES, }, { .id = SNOR_ID(0xc8, 0x60, 0x16), .name = "gd25lq32", -- 2.51.0