From: Jongwon Lee <ai@linux.com>
To: Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <jic23@kernel.org>,
Dave Jiang <dave.jiang@intel.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Dan Williams <djbw@kernel.org>
Cc: Ira Weiny <iweiny@kernel.org>, Li Ming <ming.li@zohomail.com>,
Richard Cheng <icheng@nvidia.com>,
linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v5 3/3] cxl/edac: Mask DPA flags in the event record cache key
Date: Sun, 08 Nov 2026 11:20:25 +0900 [thread overview]
Message-ID: <20261108022022.3352-4-ai@linux.com> (raw)
In-Reply-To: <20261108022022.3352-1-ai@linux.com>
The low bits of the DPA field in General Media and DRAM event records
are flags. Bit 0 is VOLATILE and bit 1 is NOT_REPAIRABLE. The trace
events print the DPA with CXL_DPA_MASK applied, while
cxl_store_rec_gen_media() and cxl_store_rec_dram() use the raw value as
the xarray key.
User space takes the DPA from the trace event and writes it to the
mem_repair dpa attribute. If the record has any flag set, xa_load() does
not find it and the repair fails with -EINVAL.
Use the masked DPA as the key. Records marked NOT_REPAIRABLE are still
rejected, because the lookup skips them.
Fixes: 0b5ccb0de1e2 ("cxl/edac: Support for finding memory operation attributes from the current boot")
Signed-off-by: Jongwon Lee <ai@linux.com>
---
drivers/cxl/core/edac.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/cxl/core/edac.c b/drivers/cxl/core/edac.c
index 42683b7c54..f627c73ff6 100644
--- a/drivers/cxl/core/edac.c
+++ b/drivers/cxl/core/edac.c
@@ -918,6 +918,16 @@ struct cxl_mem_repair_attrbs {
enum cxl_mem_repair_type repair_type;
};
+/*
+ * The low bits of the event record DPA are flags (VOLATILE, NOT_REPAIRABLE).
+ * Records are looked up by the DPA user space writes back, which comes from
+ * the trace event and has the flags masked off, so key them the same way.
+ */
+static inline unsigned long cxl_rec_dpa(const struct cxl_event_media_hdr *hdr)
+{
+ return le64_to_cpu(hdr->phys_addr) & CXL_DPA_MASK;
+}
+
static inline bool cxl_rec_not_repairable(const struct cxl_event_media_hdr *hdr)
{
return le64_to_cpu(hdr->phys_addr) & CXL_DPA_NOT_REPAIRABLE;
@@ -1131,8 +1141,7 @@ int cxl_store_rec_gen_media(struct cxl_memdev *cxlmd, union cxl_event *evt)
return -ENOMEM;
old_rec = xa_store(&array_rec->rec_gen_media,
- le64_to_cpu(rec->media_hdr.phys_addr), rec,
- GFP_KERNEL);
+ cxl_rec_dpa(&rec->media_hdr), rec, GFP_KERNEL);
if (xa_is_err(old_rec)) {
kfree(rec);
return xa_err(old_rec);
@@ -1161,8 +1170,7 @@ int cxl_store_rec_dram(struct cxl_memdev *cxlmd, union cxl_event *evt)
return -ENOMEM;
old_rec = xa_store(&array_rec->rec_dram,
- le64_to_cpu(rec->media_hdr.phys_addr), rec,
- GFP_KERNEL);
+ cxl_rec_dpa(&rec->media_hdr), rec, GFP_KERNEL);
if (xa_is_err(old_rec)) {
kfree(rec);
return xa_err(old_rec);
--
2.55.0
next prev parent reply other threads:[~2026-11-08 2:20 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-08 2:20 [PATCH v5 0/3] cxl/edac: Fix event record lookups for memory repair Jongwon Lee
2026-11-08 2:20 ` [PATCH v5 1/3] cxl/edac: Read cached DRAM event records under the xarray lock Jongwon Lee
2026-11-08 2:20 ` [PATCH v5 2/3] cxl/edac: Skip event records marked NOT_REPAIRABLE Jongwon Lee
2026-11-10 12:53 ` Li Ming
2026-11-08 2:20 ` Jongwon Lee [this message]
2026-11-10 12:54 ` [PATCH v5 3/3] cxl/edac: Mask DPA flags in the event record cache key Li Ming
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