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The helper is only used by drivers for AMD hardware to implement legacy mode setting. As in drm_crtc_init(), create a primary plane for the CRTC. Use the same formats as with drm_crtc_init(). Format modifiers are still marked as unsupported and handled internally by the plane. For the CRTC, call drm_crtc_init_with_planes() for initialization. Clean up on errors. Signed-off-by: Thomas Zimmermann --- drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 44 ++++++++++++++++++++++++-- 1 file changed, 41 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c index 05d7da888f49..0fe7f13cb8c1 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c @@ -25,6 +25,8 @@ #include #include #include +#include +#include #include #include "amdgpu.h" @@ -2639,6 +2641,18 @@ static const struct drm_crtc_helper_funcs dce_v10_0_crtc_helper_funcs = { .get_scanout_position = amdgpu_crtc_get_scanout_position, }; +static const u32 dce_v10_0_drm_primary_plane_formats[] = { + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ARGB8888, +}; + +static const struct drm_plane_funcs dce_v10_0_drm_primary_plane_funcs = { + .update_plane = drm_plane_helper_update_primary, + .disable_plane = drm_plane_helper_disable_primary, + .destroy = drm_plane_helper_destroy, + DRM_PANIC_PLANE_FUNCS, +}; + static void dce_v10_0_panic_flush(struct drm_plane *plane) { struct drm_framebuffer *fb; @@ -2667,14 +2681,31 @@ static const struct drm_plane_helper_funcs dce_v10_0_drm_primary_plane_helper_fu static int dce_v10_0_crtc_init(struct amdgpu_device *adev, int index) { + struct drm_device *dev = adev_to_drm(adev); + struct drm_plane *primary; struct amdgpu_crtc *amdgpu_crtc; + int ret; + + /* possible_crtc's will be filled in later by crtc_init */ + primary = __drm_universal_plane_alloc(dev, sizeof(*primary), 0, 0, + &dce_v10_0_drm_primary_plane_funcs, + dce_v10_0_drm_primary_plane_formats, + ARRAY_SIZE(dce_v10_0_drm_primary_plane_formats), + NULL, DRM_PLANE_TYPE_PRIMARY, NULL); + if (IS_ERR(primary)) + return PTR_ERR(primary); amdgpu_crtc = kzalloc(sizeof(struct amdgpu_crtc) + (AMDGPUFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL); - if (amdgpu_crtc == NULL) - return -ENOMEM; + if (!amdgpu_crtc) { + ret = -ENOMEM; + goto err_drm_plane_cleanup; + } - drm_crtc_init(adev_to_drm(adev), &amdgpu_crtc->base, &dce_v10_0_crtc_funcs); + ret = drm_crtc_init_with_planes(dev, &amdgpu_crtc->base, primary, NULL, + &dce_v10_0_crtc_funcs, NULL); + if (ret) + goto err_kfree; drm_mode_crtc_set_gamma_size(&amdgpu_crtc->base, 256); amdgpu_crtc->crtc_id = index; @@ -2715,6 +2746,13 @@ static int dce_v10_0_crtc_init(struct amdgpu_device *adev, int index) drm_plane_helper_add(amdgpu_crtc->base.primary, &dce_v10_0_drm_primary_plane_helper_funcs); return 0; + +err_kfree: + kfree(amdgpu_crtc); +err_drm_plane_cleanup: + drm_plane_cleanup(primary); + kfree(primary); + return ret; } static int dce_v10_0_early_init(struct amdgpu_ip_block *ip_block) -- 2.56.0