From: Conor Dooley <conor@kernel.org>
To: Ajay Neeli <ajay.neeli@amd.com>
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
sai.krishna.potthuri@amd.com, alim.akhtar@samsung.com,
bvanassche@acm.org, beanhuo@micron.com,
linux-scsi@vger.kernel.org, devicetree@vger.kernel.org,
git@amd.com, michal.simek@amd.com, srinivas.goud@amd.com,
radhey.shyam.pandey@amd.com
Subject: Re: [PATCH] dt-bindings: ufs: amd,versal2-ufs: Add ref_clk clock property
Date: Wed, 11 Nov 2026 18:13:42 +0000 [thread overview]
Message-ID: <20261111-facility-pristine-82e76afe8d8b@spud> (raw)
In-Reply-To: <20261111043840.906301-1-ajay.neeli@amd.com>
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On Wed, Nov 11, 2026 at 10:08:40AM +0530, Ajay Neeli wrote:
> Add ref_clk clock property to specify the reference clock frequency
> supplied to the UFS device.
>
> The AMD Versal2 UFS controller operates with a 26 MHz reference clock.
> UFS 3.x devices default their bRefClkFreq attribute to 26 MHz, matching
> the controller, so no explicit configuration is needed. However, UFS 4.0
> and later devices default bRefClkFreq to 52 MHz, expecting a 52 MHz
> reference clock. This mismatch causes timing violations and link
> instability.
>
> Adding the ref_clk property allows the UFS driver to read the actual
> reference clock frequency from the devicetree and program the device
> bRefClkFreq attribute accordingly during initialization.
>
> Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
> ---
> .../devicetree/bindings/ufs/amd,versal2-ufs.yaml | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/ufs/amd,versal2-ufs.yaml b/Documentation/devicetree/bindings/ufs/amd,versal2-ufs.yaml
> index c00ec342d574..e294c0f1b0ce 100644
> --- a/Documentation/devicetree/bindings/ufs/amd,versal2-ufs.yaml
> +++ b/Documentation/devicetree/bindings/ufs/amd,versal2-ufs.yaml
> @@ -20,11 +20,12 @@ properties:
> maxItems: 1
>
> clocks:
> - maxItems: 1
> + maxItems: 2
Please add an items list here.
>
> clock-names:
> items:
> - const: core
> + - const: ref_clk
its a clock by nature, don't restate that in the name.
pw-bot: changes-requested
Thanks,
Conor.
>
> power-domains:
> maxItems: 1
> @@ -52,10 +53,10 @@ examples:
> ufs@f10b0000 {
> compatible = "amd,versal2-ufs";
> reg = <0xf10b0000 0x1000>;
> - clocks = <&ufs_core_clk>;
> - clock-names = "core";
> + clocks = <&ufs_core_clk>, <&ufs_ref_clk>;
> + clock-names = "core", "ref_clk";
> resets = <&scmi_reset 4>, <&scmi_reset 35>;
> reset-names = "host", "phy";
> interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
> - freq-table-hz = <0 0>;
> + freq-table-hz = <0 0>, <26000000 26000000>;
> };
> --
> 2.43.7
>
>
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prev parent reply other threads:[~2026-11-11 18:13 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-11 4:38 [PATCH] dt-bindings: ufs: amd,versal2-ufs: Add ref_clk clock property Ajay Neeli
2026-11-11 18:13 ` Conor Dooley [this message]
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