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Ip=[165.204.84.17]; Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: EA8PEPF0000000A.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6601 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "amd-gfx" X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 From: Gabriel Abarca Update dcfclk deep sleep calcs and register size limit accounting Cc: Dillon Varone Signed-off-by: Gabriel Abarca Signed-off-by: Wayne Lin Signed-off-by: Austin Zheng --- .../dml2_core/dml2_core_dcn6_calcs_dchub.c | 4 +-- .../dml2_core_dcn6_funcs_mode_programming.c | 25 +++---------------- 2 files changed, 6 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_calcs_dchub.c b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_calcs_dchub.c index b3a2858281ec..a61a1037bb73 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_calcs_dchub.c +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_calcs_dchub.c @@ -1041,9 +1041,9 @@ static void dcn6_rq_dlg_get_dlg_reg( if (disp_dlg_regs->refcyc_per_pte_group_nom_c >= (unsigned int)math_pow(2, 23)) disp_dlg_regs->refcyc_per_pte_group_nom_c = (unsigned int)(math_pow(2, 23) - 1); } - DML_ASSERT(disp_dlg_regs->refcyc_per_pte_group_vblank_l < (unsigned int)math_pow(2, 13)); + DML_ASSERT(disp_dlg_regs->refcyc_per_pte_group_vblank_l < (unsigned int)math_pow(2, 23)); if (l->dual_plane) { - DML_ASSERT(disp_dlg_regs->refcyc_per_pte_group_vblank_c < (unsigned int)math_pow(2, 13)); + DML_ASSERT(disp_dlg_regs->refcyc_per_pte_group_vblank_c < (unsigned int)math_pow(2, 23)); } DML_ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_l < (unsigned int)math_pow(2, 13)); diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_programming.c b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_programming.c index 464b7b00e8c2..372691a263d5 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_programming.c +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn6_funcs_mode_programming.c @@ -519,26 +519,10 @@ static void dcn6_mp_calculate_dcfclk_deep_sleep_hysteresis(struct dml2_core_calc struct dml2_core_internal_mode_program *states) { const struct dml2_core_ip_params *ip = ctx->ip; - const struct dml2_utm_soc_bb *soc_bb = ctx->soc_bb; - struct dml2_core_internal_mode_program *inputs = states; struct dml2_core_internal_mode_program *outputs = states; - const struct dml2_sop_table *sop_table = &soc_bb->sop_table; - struct dml2_soc_operating_point max_sop; - double min_return_latency_in_DCFCLK_cycles = 0; - const long min_return_uclk_cycles = 83; - const long min_return_fclk_cycles = 75; - - sop_table->get_max_sop(sop_table, &max_sop); - min_return_latency_in_DCFCLK_cycles = - (min_return_uclk_cycles / (max_sop.uclk_khz / 1000.0) - + min_return_fclk_cycles / (max_sop.fclk_khz / 1000.0)) - * inputs->Dcfclk; - - outputs->min_return_latency_in_dcfclk = (unsigned int)min_return_latency_in_DCFCLK_cycles; - outputs->dcfclk_deep_sleep_hysteresis = (unsigned int)math_max2( - 32, - (double)ip->pixel_chunk_size_kbytes * 1024 * 3 / 4 / 64 - - min_return_latency_in_DCFCLK_cycles); + + outputs->min_return_latency_in_dcfclk = 0; + outputs->dcfclk_deep_sleep_hysteresis = (unsigned int)math_max2(32, (double)ip->pixel_chunk_size_kbytes * 1024 * 3 / 4 / 64); } void dcn6_calculate_mode_programming(struct dml2_core_calculate_mp_context *ctx, @@ -558,8 +542,6 @@ void dcn6_calculate_mode_programming(struct dml2_core_calculate_mp_context *ctx, dcn6_mp_calculate_vm_group_and_request_times(ctx, states); - dcn6_mp_calculate_vstartup_adjustment(ctx, states); - dcn6_mp_calculate_max_bandwidth_used(ctx, states); dcn6_mp_calculate_stutter_efficiency(ctx, states); @@ -1394,6 +1376,7 @@ enum dml2_status dml2_core_dcn6_funcs_populate_programming(struct dml2_core_inst dcn6_mp_initialize_from_solution(&mode_lib->mp, solution, core->utm_soc_bb); dcn6_mp_build_calculate_mp_context(calc_mp_ctx, core, solution); dcn6_calculate_mode_programming(calc_mp_ctx, &mode_lib->mp); + dcn6_mp_calculate_vstartup_adjustment(calc_mp_ctx, &mode_lib->mp); dcn6_populate_mode_programming(calc_mp_ctx, programming, &mode_lib->scratch, mode_lib, solution, core->utm_soc_bb); DML_LOG_DEBUG("%s exit\n", __func__); -- 2.43.0