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(Red Hat Linux)) id 1xRPds-00000008z71-1ioh for linux-riscv@lists.infradead.org; Thu, 12 Nov 2026 07:54:57 +0000 X-Envelope-To: linux-riscv@lists.infradead.org DKIM-Signature: a=rsa-sha256; bh=+64NsR6ul3OZ/C2gNEoQRkSF05SWBVdC/PV5wsbpHBI=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1794470080; v=1; x=1795074880; b=gCeQCAUqrK9rD27CpGVLGtePt+9dgReeb/a0KsLnvGEV0B+bLM871z7QXVooQb7tijXQs4Ps gCMMlLIpnMeyp8Q0BfiH226MyZix3eFkaGEoB+W3KW8HiDr6jhXrxGoBnY6XRK6jEL1EIqZHUB9 s7IZx3iFYq/rz8E8/i0b/bXQ= X-Envelope-To: linux-riscv@lists.infradead.org Received: by mta10.migadu.com with ESMTPS id 149ddc421f06301b; Thu, 12 Nov 2026 07:54:40 +0000 X-Mizu-Trace-ID: 149ddc421f06301b X-Migadu-Flow: FLOW_OUT From: Troy Mitchell Subject: [PATCH v2 0/2] irqchip/riscv-imsic: Synchronize remote state with IRQ work Date: Thu, 12 Nov 2026 07:54:31 +0000 Message-Id: <20261112-imsic-remote-sync-irqwork-v2-0-680f65b24ff6@linux.dev> X-Archived-By: MIME-Version: 1.0 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server-digest SHA256) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71D6E606A321 for ; Thu, 12 Nov 2026 07:54:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.2 smtp.subspace.kernel.org 71D6E606A321 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key, unprotected) header.d=linux.dev header.i=@linux.dev header.a=rsa-sha256 header.s=key1 header.b=gCeQCAUq X-Envelope-To: linux-rt-devel@lists.linux.dev DKIM-Signature: a=rsa-sha256; bh=+64NsR6ul3OZ/C2gNEoQRkSF05SWBVdC/PV5wsbpHBI=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1794470080; v=1; x=1795074880; b=gCeQCAUqrK9rD27CpGVLGtePt+9dgReeb/a0KsLnvGEV0B+bLM871z7QXVooQb7tijXQs4Ps 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X-Change-ID: 20261103-imsic-remote-sync-irqwork-9cfec6c410de To: Thomas Gleixner , Radu Rendec , Anup Patel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt , =?utf-8?q?Bj=C3=B6rn_T=C3=B6pel?= Cc: Anup Patel , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-rt-devel@lists.linux.dev, Troy Mitchell X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2978; i=troy.mitchell@linux.dev; h=from:subject:message-id; bh=+64NsR6ul3OZ/C2gNEoQRkSF05SWBVdC/PV5wsbpHBI=; b=owGbwMvMwCU2g/N9w09jE33G02pJDFlfC3Z2yDi8s/mQfCX9haPbr5++Z2Mavr0NWrxhD59t/ arZqxz9OkpZGMS4GGTFFFm6H/BsK/CJsi0QKPSFmcPKBDKEgYtTACZiFsrwz+ao57trPa8emWn/ vM0c9+8pU11n8fI8R25ze8fr27+aazL80/p8rV5vrcns7/cvxq7yfNCl42EeYxm61HGyy/QLe+I s+AE= X-Developer-Key: i=troy.mitchell@linux.dev; a=openpgp; fpr=3FE5535CF1B0E658E57DB59BAE1C2FBEA7DB42E1 This was found while bringing up the SoC timer on SpacemiT K3 as a tick broadcast device. Without a real broadcast device, the tick code falls back to the hrtimer based broadcast, which keeps one CPU's local timer running. Once the SoC timer is registered it replaces the hrtimer broadcast, and every CPU may stop its local timer in idle. On K3 the SoC timer interrupt goes through APLIC in MSI mode to IMSIC. When the CPU owning it goes offline, the interrupt is moved to a CPU that may already be idle with its local timer stopped. IMSIC leaves the enable on the new target to a timer on that CPU, and that timer can only fire through the broadcast interrupt, which is not enabled yet. The system stalls. Patch 1 makes remote synchronization use hard IRQ work, which fixes the stall. A vector move can still take long to finish. The CPU entering idle takes over the broadcast interrupt and syncs the new vector before the old CPU has released the old one, so it arms a retry timer on itself with its tick already stopped. The move then completes only on its next interrupt, up to 0.5s later on an idle K3, and affinity changes of the IRQ return -EBUSY until then. Patch 2 lets the old CPU kick the new CPU instead and removes the retry timer. --- Changes in v2: - Patch 1 unchanged. - New patch 2: once the old CPU has released the old vector it queues the sync work on the new CPU, which then completes the move from its own IRQ work. The per-CPU retry timer is dropped, since a move that has to wait for the old CPU could only complete on an interrupt driven by a timer that may itself be stopped. - Link to v1: https://patch.msgid.link/20261103-imsic-remote-sync-irqwork-v1-1-8b5c951fc62a@linux.dev To: Thomas Gleixner To: Radu Rendec To: Anup Patel To: Paul Walmsley To: Palmer Dabbelt To: Albert Ou To: Alexandre Ghiti To: Sebastian Andrzej Siewior To: Clark Williams To: Steven Rostedt To: Björn Töpel Cc: Anup Patel Cc: linux-kernel@vger.kernel.org Cc: linux-riscv@lists.infradead.org Cc: linux-rt-devel@lists.linux.dev --- Troy Mitchell (2): irqchip/riscv-imsic: Synchronize remote state with IRQ work irqchip/riscv-imsic: Complete vector moves without a timer drivers/irqchip/Kconfig | 1 + drivers/irqchip/irq-riscv-imsic-early.c | 5 +- drivers/irqchip/irq-riscv-imsic-state.c | 87 ++++++++++++++------------------- drivers/irqchip/irq-riscv-imsic-state.h | 6 +-- 4 files changed, 42 insertions(+), 57 deletions(-) --- base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4 change-id: 20261103-imsic-remote-sync-irqwork-9cfec6c410de Best regards, -- Troy Mitchell