From: Christoph Hellwig <hch@lst.de>
To: Paul Menzel <pmenzel@molgen.mpg.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
dlemoal@kernel.org, cassel@kernel.org, kbusch@kernel.org,
axboe@kernel.dk, hch@lst.de, sagi@grimberg.me,
linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, Alexey.Bogoslavsky@sandisk.com
Subject: Re: [PATCH RFC] PCI: Start the reset of WD PC SN730 NVMe controllers early
Date: Thu, 12 Nov 2026 22:07:18 +0100 [thread overview]
Message-ID: <20261112210718.GA11040@lst.de> (raw)
In-Reply-To: <20261111163145.75027-2-pmenzel@molgen.mpg.de>
On Wed, Nov 11, 2026 at 05:31:43PM +0100, Paul Menzel wrote:
> devmem, works: the driver finds CSTS.RDY clear and continues, the reset
> completed within the first poll in 29 of 30 boots (35 polls once), and
> none of the 30 boots showed a slow reset, enable or read, against 8 of
> 90 without it. The difference is not yet significant (p = 0.1).
>
> So start the reset in a final fixup during enumeration, at 0.19 s on
> this machine, about 100 ms before nvme probes, which overlaps a slow
> reset with the remaining kernel initialization and the module loading,
> and costs nothing for fast ones.
Umm, no. PCI quirks are not a way to speed up slow device
initialization, which while annoying is not a bug per se.
prev parent reply other threads:[~2026-11-12 21:07 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-11 16:31 [PATCH RFC] PCI: Start the reset of WD PC SN730 NVMe controllers early Paul Menzel
2026-11-11 17:04 ` sashiko-bot
2026-11-12 21:07 ` Christoph Hellwig [this message]
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