From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=100.103.45.18 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1794591528; b=HSSzvxYXlOS1umuFWktCxvuuYr4dHgCEMjziQwsuQAkGlKjftSvCMHxQGMumj0jiwptM iumWbB/ZrzqJRB1ElYctW385XkHkXqGXghFFO0dniDMk+ecVONLNM4qq35axMOMbcRHcZ HaV9myY6MWtL+FO4NSRbCiVwmzI6WLLTnYfU0vIz7ZmybsoKjxuBrEpXs7SFF14FkCCJV aWEdy3192WP6OOqmh7+wqjXp5mHDeuxP7Dp5WW5QJM2DDr6c3Cd6tVl7t+vhrAuabOaRM 2AQ9KD5+ZZuUHT7kVtHwSJMfu2O4c4932OfYXY0olpq42VAHHTTkdcqeODEaMRQOj5A== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1794591528; h=Received:DKIM-Signature:From:To:Cc:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:User-Agent:X-stable:X-Patchwork-Hint: MIME-Version:Content-Transfer-Encoding; bh=uzlUSq4gri8yxDDd5OQ57Vl3DIe/ejx7cbupMMbnnNA=; b=F8K9JTKl+G1mYehvw/N/K9wQZgMLMO6BCNYaEsbtOr9IS0CmStHJPE2ljme9Ew48Y83W ovGRhbqGxftj/T+NUibWXq4JRrxXW88wEqF+cYxOpG9yxbW2cMOxa/fB9Sptlcp9O3BNg MOGMux53eDxWZu4EpPcewD4685doMO1df61759Zgq9YipaVugz9kpwifIVtO8cXV5dmiL DObxrtvCV3NgrtzbrtZSgUujEPLeFHtgV8ct1c/GNgAIbS5i/EJGe6lrGYMkoIHlTIS+D Wbk1A+WTn92Ny8hz3ZGyt5lP2iJlzVo9/dPVDRpabHRUAXxgThTaVc7YGULaAKEJS8g== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass header.d=linuxfoundation.org header.i=@linuxfoundation.org header.a=rsa-sha256 header.s=korg header.b=kjCKWX7f; arc=none smtp.remote-ip=100.103.45.18 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F11A6606D4B1; Fri, 13 Nov 2026 17:38:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.a=rsa-sha256 header.s=korg header.b=kjCKWX7f Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9DA681F000C5; Fri, 13 Nov 2026 17:38:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1794591527; bh=uzlUSq4gri8yxDDd5OQ57Vl3DIe/ejx7cbupMMbnnNA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=kjCKWX7fYuI2v8eUeHAARbP7HkIsI9UfJAh5hFFbaZSmr6WST/HMc/hGxhIyZlf1h tuvbCfFNnGSUbVlaowkplIGHGASkBW/H14D6/tEPDeFJtq6Wy7G6QiYyjfjIaUjydw eiYL01WFPZiaDqQp6ES8AhBO2JvbdJzkYGpJ+8+k= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Oliver Upton , Fuad Tabba , Marc Zyngier , Sasha Levin Subject: [PATCH 6.12 585/670] KVM: arm64: vgic: Stop the target vcpu when disabling LPIs Date: Fri, 13 Nov 2026 10:52:29 -0500 Message-ID: <20261113153831.663799787@linuxfoundation.org> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261113153811.177190860@linuxfoundation.org> References: <20261113153811.177190860@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore X-Mailing-List: stable@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Marc Zyngier [ Upstream commit a1b4bd2c2c262b8094c86afb99364d16ac08cb66 ] Disabling LPIs is pretty nasty, as it directly messes with the AP list of the affected CPU, which could be running... This has the potential to lead to really bad behaviours, and we should not be doing that. Take example on the way the Active state is handled and simply pause the the vcpu so that we are sure it is in a quiescent state, and the state be safely manipulated. Nobody has any expectation of performance for this anyway. Fixes: 96085b949672d ("KVM: arm/arm64: vgic-v3: Retire pending interrupts on disabling LPIs") Co-developed-by: Oliver Upton Signed-off-by: Oliver Upton Cc: stable@vger.kernel.org Reviewed-by: Fuad Tabba Tested-by: Fuad Tabba Link: https://patch.msgid.link/20261015100539.1011760-7-maz@kernel.org Signed-off-by: Marc Zyngier [ sashal: replaced missing kvm_pause_vcpu() and kvm_resume_vcpu() calls with VM-wide kvm_arm_halt_guest() and kvm_arm_resume_guest() ] Signed-off-by: Sasha Levin --- arch/arm64/kvm/vgic/vgic-mmio-v3.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v3.c b/arch/arm64/kvm/vgic/vgic-mmio-v3.c index 6e157b0b21adf..c62666adc2f8d 100644 --- a/arch/arm64/kvm/vgic/vgic-mmio-v3.c +++ b/arch/arm64/kvm/vgic/vgic-mmio-v3.c @@ -276,9 +276,19 @@ static void vgic_mmio_write_v3r_ctlr(struct kvm_vcpu *vcpu, if (ctlr != GICR_CTLR_ENABLE_LPIS) return; + /* + * Yes, disabling LPIs is painful, since it can be done from + * a *remote* vcpu! So let's not take any chance, and make + * sure that the target vCPU has written their LRs back to the + * irq structures, and release any reference they would have. + * + * If it hurts, don't do it. + */ + kvm_arm_halt_guest(vcpu->kvm); vgic_flush_pending_lpis(vcpu); vgic_its_invalidate_all_caches(vcpu->kvm); atomic_set_release(&vgic_cpu->ctlr, 0); + kvm_arm_resume_guest(vcpu->kvm); } else { ctlr = atomic_cmpxchg_acquire(&vgic_cpu->ctlr, 0, GICR_CTLR_ENABLE_LPIS); -- 2.53.0