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[178.126.219.156]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c5095b5a4c1sm161402666b.48.2026.11.13.17.43.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Nov 2026 17:43:56 -0800 (PST) From: ElXreno To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, rodrigo.vivi@intel.com, joonas.lahtinen@linux.intel.com, tursulin@ursulin.net, ville.syrjala@linux.intel.com, ankit.k.nautiyal@intel.com, mitulkumar.ajitkumar.golani@intel.com, airlied@gmail.com, simona@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, ElXreno Subject: [PATCH 1/7] drm/i915/panel: Fix the pixel clock overflow in the VRR vtotal Date: Sat, 14 Nov 2026 04:43:29 +0300 Message-ID: <20261114014335.2132756-2-elxreno@gmail.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261114014335.2132756-1-elxreno@gmail.com> References: <20261114014335.2132756-1-elxreno@gmail.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit intel_panel_compute_config_vrr() multiplies the pixel clock in kHz by 1000 in a signed int. A 3840x2400@240 timing has a 2342.4 MHz pixel clock, the product overflows, and the vertical total computed for a refresh rate other than that of the fixed mode comes out negative. Do the multiplication in 64 bits. This needs a fixed mode above 2147 MHz, so one that uses the joiner, inside the VRR range of the panel, and a request for another refresh rate that ends up on that fixed mode, as the allow_modeset=false path does for a mode that is VRR compatible with the current one. Fixes: a2da67028cd0 ("drm/i915: Allow arbitrary refresh rates with VRR eDP panels") Signed-off-by: ElXreno --- drivers/gpu/drm/i915/display/intel_panel.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c index 81e638d0c7b3..157be3153c7e 100644 --- a/drivers/gpu/drm/i915/display/intel_panel.c +++ b/drivers/gpu/drm/i915/display/intel_panel.c @@ -277,8 +277,8 @@ static int intel_panel_compute_config_vrr(struct intel_atomic_state *state, int vsync_end_offset = adjusted_mode->vtotal - adjusted_mode->vsync_end; adjusted_mode->vtotal = - DIV_ROUND_CLOSEST(adjusted_mode->clock * 1000, - adjusted_mode->htotal * vrefresh); + DIV_ROUND_CLOSEST_ULL(mul_u32_u32(adjusted_mode->clock, 1000), + adjusted_mode->htotal * vrefresh); adjusted_mode->vsync_start = adjusted_mode->vtotal - vsync_start_offset; adjusted_mode->vsync_end = adjusted_mode->vtotal - vsync_end_offset; -- 2.56.0