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Wed, 24 Jun 2026 08:30:45 -0700 (PDT) Received: from timur-max.localnet ([62.77.225.138]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-492640260a6sm372785e9.6.2026.06.24.08.30.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Jun 2026 08:30:44 -0700 (PDT) From: Timur =?UTF-8?B?S3Jpc3TDs2Y=?= To: amd-gfx@lists.freedesktop.org, Alexander.Deucher@amd.com, Christian =?UTF-8?B?S8O2bmln?= , Natalie Vock , Amir Shetaia , Marek =?UTF-8?B?T2zFocOhaw==?= , Mario Limonciello , Siwei He , Philip Yang , Mukul Joshi , Tvrtko Ursulin Subject: Re: [PATCH 5/7] drm/amdgpu/gmc12.0: Use AMDGPU_PTE_IS_PTE flag for init_pte_flags on GFX12.0 Date: Wed, 24 Jun 2026 17:30:42 +0200 Message-ID: <2128479.Jadu78ljVU@timur-max> In-Reply-To: <3e09e693-5494-49e7-8aaa-2338867991f5@ursulin.net> References: <20260529103059.21470-1-timur.kristof@gmail.com> <20260529103059.21470-6-timur.kristof@gmail.com> <3e09e693-5494-49e7-8aaa-2338867991f5@ursulin.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On 2026. j=C3=BAnius 24., szerda 16:54:04 k=C3=B6z=C3=A9p-eur=C3=B3pai ny= =C3=A1ri id=C5=91 Tvrtko Ursulin=20 wrote: > On 29/05/2026 11:30, Timur Krist=C3=B3f wrote: > > According to some SVM code this flag is necessary on > > also GFX12.0 not just GFX12.1. > >=20 > > Signed-off-by: Timur Krist=C3=B3f > > --- > >=20 > > drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > >=20 > > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c > > b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c index > > 586703ec0dfa0..7bbf5f848ce1b 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c > > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c > > @@ -641,11 +641,12 @@ static int gmc_v12_0_early_init(struct > > amdgpu_ip_block *ip_block)>=20 > > adev->gmc.xgmi.connected_to_cpu =3D > > =09 > > adev->smuio.funcs- >is_host_gpu_xgmi_supported(adev); > >=20 > > + adev->gmc.init_pte_flags =3D AMDGPU_PTE_IS_PTE; > > + > >=20 > > switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { > > =09 > > case IP_VERSION(12, 1, 0): > > gmc_v12_1_set_gmc_funcs(adev); > > gmc_v12_1_set_irq_funcs(adev); > >=20 > > - adev->gmc.init_pte_flags =3D AMDGPU_PTE_IS_PTE; > >=20 > > break; > > =09 > > default: > > gmc_v12_0_set_gmc_funcs(adev); >=20 > Code is fine but I don't have the inside knowledge to comment on the > GFX12.0 vs GFX12.1 situation. Where is this SVM code commit message > mentions? Hi, amdgpu_vm_pte_update_flags() has the following comment: /* Workaround for fault priority problem on GMC9 and GFX12, * EXECUTABLE for GMC9 fault priority and init_pte_flags * (e.g. AMDGPU_PTE_IS_PTE on GFX12) */ svm_range_get_pte_flags() unconditionally uses this PTE flag on GFX12.x, ad= ded=20 by this commit: a8a4615ba0fa3ee1248ae2184e7e848d7b644e70 which says: "This resolves the issues related to SVM enablement in GFX12." While they don't elaborate what exactly the problem is that is being worked= =20 around, it is pretty clear that the flag is necessary for proper fault hand= ling=20 on GFX12.x and indeed I can confirm that it solves the problem for me. I th= ink=20 the reason why it was missing here is because the authors just fixed the is= sue=20 for SVM and forgot to fix it also for graphics. Timur >=20 > Otherwise, maybe people who added this workaround could review? Those > two are the relevant patches AFAICT: >=20 > commit db29ddf6505f3e831e000c95ae013b18a37f70bc > Author: Mukul Joshi > Date: Thu Apr 24 21:51:23 2025 -0400 >=20 > drm/amdgpu: Add per-ASIC PTE init flag >=20 >=20 > commit 9d47b2c36b9a6c6b844c33cab407a5d7ad102234 > Author: Siwei He > Date: Tue Apr 14 14:46:54 2026 -0400 >=20 > drm/amdgpu: OR init_pte_flags into invalid leaf PTE update >=20 > I took the liberty to add some CCs. >=20 > Regards, >=20 > Tvrtko