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From: Kenneth Graunke <kenneth@whitecape.org>
To: mesa-dev@lists.freedesktop.org, Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/4] i965: Transplant PIPE_CONTROL routines to brw_pipe_control
Date: Fri, 01 May 2015 10:58:18 -0700	[thread overview]
Message-ID: <2138903.0rBzGEVZ1X@eiger> (raw)
In-Reply-To: <1430492023-20296-2-git-send-email-chris@chris-wilson.co.uk>


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On Friday, May 01, 2015 03:53:40 PM Chris Wilson wrote:
> Start trimming the fat from intel_batchbuffer.c. First by moving the set
> of routines for emitting PIPE_CONTROLS (along with the lore concerning
> hardware workarounds) to a separate brw_pipe_control.c
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  src/mesa/drivers/dri/i965/Makefile.sources    |   1 +
>  src/mesa/drivers/dri/i965/brw_context.h       |  12 +
>  src/mesa/drivers/dri/i965/brw_pipe_control.c  | 335 ++++++++++++++++++++++++++
>  src/mesa/drivers/dri/i965/intel_batchbuffer.c | 304 -----------------------
>  src/mesa/drivers/dri/i965/intel_batchbuffer.h |  10 -
>  5 files changed, 348 insertions(+), 314 deletions(-)
>  create mode 100644 src/mesa/drivers/dri/i965/brw_pipe_control.c
> 
> diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources
> index 6d4659f..a9f9129 100644
> --- a/src/mesa/drivers/dri/i965/Makefile.sources
> +++ b/src/mesa/drivers/dri/i965/Makefile.sources
> @@ -82,6 +82,7 @@ i965_FILES = \
>  	brw_object_purgeable.c \
>  	brw_packed_float.c \
>  	brw_performance_monitor.c \
> +	brw_pipe_control.c \
>  	brw_primitive_restart.c \
>  	brw_program.c \
>  	brw_program.h \
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
> index e2f26f5..7241816 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -1945,6 +1945,18 @@ gen6_upload_push_constants(struct brw_context *brw,
>                             struct brw_stage_state *stage_state,
>                             enum aub_state_struct_type type);
>  
> +/* brw_pipe_control.c */
> +void brw_emit_pipe_control_flush(struct brw_context *brw, uint32_t flags);
> +void brw_emit_pipe_control_write(struct brw_context *brw, uint32_t flags,
> +                                 drm_intel_bo *bo, uint32_t offset,
> +                                 uint32_t imm_lower, uint32_t imm_upper);
> +void intel_batchbuffer_emit_mi_flush(struct brw_context *brw);
> +void intel_emit_post_sync_nonzero_flush(struct brw_context *brw);
> +void intel_emit_depth_stall_flushes(struct brw_context *brw);
> +void gen7_emit_vs_workaround_flush(struct brw_context *brw);
> +void gen7_emit_cs_stall_flush(struct brw_context *brw);
> +
> +
>  #ifdef __cplusplus
>  }
>  #endif
> diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c b/src/mesa/drivers/dri/i965/brw_pipe_control.c
> new file mode 100644
> index 0000000..c216f6d
> --- /dev/null
> +++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c
> @@ -0,0 +1,335 @@
> +/**************************************************************************
> + *
> + * Copyright 2006 VMware, Inc.
> + * All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the
> + * "Software"), to deal in the Software without restriction, including
> + * without limitation the rights to use, copy, modify, merge, publish,
> + * distribute, sub license, and/or sell copies of the Software, and to
> + * permit persons to whom the Software is furnished to do so, subject to
> + * the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the
> + * next paragraph) shall be included in all copies or substantial portions
> + * of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
> + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
> + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
> + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
> + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> + *
> + **************************************************************************/

I did a bit of archaeology, and all of the Tungsten Graphics code appears to
be long gone:

   gen8_add_cs_stall_workaround_bits - me (2014)
   gen7_cs_stall_every_four_pipe_controls - me (2014)
   brw_emit_pipe_control_flush - me (2013)
   brw_emit_pipe_control_write - me (2013)
   intel_emit_post_sync_nonzero_flush - Eric (2011)
   intel_emit_depth_stall_flushes - me (2011)
   gen7_emit_vs_workaround_flush - me (2012)
   gen7_emit_cs_stall_flush - Paul (2013)
   intel_batchbuffer_emit_mi_flush - Zhenyu (2010), Eric, and I

So I'd use this copyright instead (with more typical formatting):

/*
 * Copyright © 2010 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 */

I love that PIPE_CONTROL has its own source file now :D

Patches 1-2 are:
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

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  reply	other threads:[~2015-05-01 17:58 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-17  1:45 [PATCH 1/2] intel: Use I915_EXEC_HANDLE_LUT when available Kristian Høgsberg
2015-01-17  1:46 ` [PATCH 2/2] intel: Use I915_EXEC_NO_RELOC " Kristian Høgsberg
2015-01-17  4:23   ` Daniel Vetter
2015-01-17  9:49     ` Chris Wilson
2015-01-20  5:58       ` Kristian Høgsberg
2015-01-20  8:34         ` Daniel Vetter
2015-01-20  5:45     ` Kristian Høgsberg
2015-01-20  8:42       ` Daniel Vetter
2015-01-20 20:53         ` Kristian Høgsberg
2015-01-20 21:46           ` Chris Wilson
2015-01-21  6:10             ` Kristian Høgsberg
2015-01-21  9:11               ` Daniel Vetter
2015-01-21  9:17               ` Daniel Vetter
2015-01-21  9:24                 ` Daniel Vetter
2015-01-21  9:24               ` Chris Wilson
2015-01-17  9:46 ` [PATCH 1/2] intel: Use I915_EXEC_HANDLE_LUT " Chris Wilson
2015-05-01 14:53 ` RFC Fast batch and relocation handling for i965 Chris Wilson
2015-05-01 14:53   ` [PATCH 1/4] i965: Transplant PIPE_CONTROL routines to brw_pipe_control Chris Wilson
2015-05-01 17:58     ` Kenneth Graunke [this message]
2015-05-01 14:53   ` [PATCH 2/4] i915: Rename intel_emit* to reflect their new location in brw_pipe_control Chris Wilson
2015-05-01 14:53   ` [PATCH 3/4] i965: Move pipecontrol workaround bo to brw_pipe_control Chris Wilson
2015-05-01 14:53   ` [PATCH 4/4] i965: Introduce a context-local batch manager Chris Wilson
2015-05-05 16:16     ` [Mesa-dev] " Emil Velikov

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