From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: Jagan Teki <jagan@amarulasolutions.com>,
Andre Przywara <andre.przywara@arm.com>
Cc: Icenowy Zheng <uwu@icenowy.me>,
Jesse Taube <mr.bossman075@gmail.com>, Yifan Gu <me@yifangu.com>,
Giulio Benetti <giulio.benetti@benettiengineering.com>,
George Hilliard <thirtythreeforty@gmail.com>,
Samuel Holland <samuel@sholland.org>,
u-boot@lists.denx.de, linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 5/6] sunxi: f1c100: dtsi: add UART1 pins
Date: Wed, 12 Oct 2022 23:43:21 +0200 [thread overview]
Message-ID: <2147678.NgBsaNRSFp@kista> (raw)
In-Reply-To: <20221012163458.1968900-6-andre.przywara@arm.com>
Hi Andre,
Dne sreda, 12. oktober 2022 ob 18:34:57 CEST je Andre Przywara napisal(a):
> The F1Cx00 SoCs connect the first PortA pins to UART1.
>
> Add this to the SoC .dtsi, so boards can reference UART1 pins.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Best regards,
Jernej
> ---
> arch/arm/dts/suniv-f1c100s.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/dts/suniv-f1c100s.dtsi
> b/arch/arm/dts/suniv-f1c100s.dtsi index 0edc1724407..bc563c12e95 100644
> --- a/arch/arm/dts/suniv-f1c100s.dtsi
> +++ b/arch/arm/dts/suniv-f1c100s.dtsi
> @@ -175,6 +175,11 @@
> pins = "PE0", "PE1";
> function = "uart0";
> };
> +
> + uart1_pa_pins: uart1-pa-pins {
> + pins = "PA2", "PA3";
> + function = "uart1";
> + };
> };
>
> timer@1c20c00 {
> --
> 2.25.1
next prev parent reply other threads:[~2022-10-12 21:43 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-12 16:34 [PATCH 0/6] sunxi: improve F1C200s support Andre Przywara
2022-10-12 16:34 ` [PATCH 1/6] sunxi: Kconfig: introduce SUNXI_MINIMUM_DRAM_MB Andre Przywara
2022-10-12 21:33 ` Jernej Škrabec
2022-10-12 16:34 ` [PATCH 2/6] sunxi: fix 32MB load address layout Andre Przywara
2022-10-12 21:37 ` Jernej Škrabec
2022-10-12 16:34 ` [PATCH 3/6] sunxi: f1c100: move SKIP_LOWLEVEL_INIT_ONLY into Kconfig Andre Przywara
2022-10-12 21:38 ` Jernej Škrabec
2022-10-13 8:51 ` Icenowy Zheng
2022-10-12 16:34 ` [PATCH 4/6] sunxi: f1c100: add UART1 support Andre Przywara
2022-10-12 21:42 ` Jernej Škrabec
2022-10-18 9:23 ` Andre Przywara
2022-10-19 3:55 ` Jernej Škrabec
2022-10-12 16:34 ` [PATCH 5/6] sunxi: f1c100: dtsi: add UART1 pins Andre Przywara
2022-10-12 21:43 ` Jernej Škrabec [this message]
2022-10-12 16:34 ` [PATCH 6/6] sunxi: add CherryPi-F1C200s support Andre Przywara
2022-10-13 8:33 ` Clément Péron
2022-10-13 9:53 ` Andre Przywara
2022-10-14 5:04 ` Jesse Taube
2022-10-18 14:01 ` Andre Przywara
2022-10-20 15:52 ` Giulio Benetti
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2147678.NgBsaNRSFp@kista \
--to=jernej.skrabec@gmail.com \
--cc=andre.przywara@arm.com \
--cc=giulio.benetti@benettiengineering.com \
--cc=jagan@amarulasolutions.com \
--cc=linux-sunxi@lists.linux.dev \
--cc=me@yifangu.com \
--cc=mr.bossman075@gmail.com \
--cc=samuel@sholland.org \
--cc=thirtythreeforty@gmail.com \
--cc=u-boot@lists.denx.de \
--cc=uwu@icenowy.me \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.