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diff for duplicates of <2151229.sTi0mmqIUM@phil>

diff --git a/a/1.txt b/N1/1.txt
index b32f606..6d1c6ec 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -372,13 +372,13 @@ UOC_CON0_SIDDQ);
 > > +/*
 > > + * Enable the bypass of uart2 data through the otg usb phy.
 > > + * Original description in the TRM.
-> > + * 1. Disable the OTG block by setting OTGDISABLE0 to 1’b1.
+> > + * 1. Disable the OTG block by setting OTGDISABLE0 to 1?b1.
 > > + * 2. Disable the pull-up resistance on the D+ line by setting
-> > + *    OPMODE0[1:0] to 2’b01.
+> > + *    OPMODE0[1:0] to 2?b01.
 > > + * 3. To ensure that the XO, Bias, and PLL blocks are powered down in
-> > Suspend + *    mode, set COMMONONN to 1’b1.
-> > + * 4. Place the USB PHY in Suspend mode by setting SUSPENDM0 to 1’b0.
-> > + * 5. Set BYPASSSEL0 to 1’b1.
+> > Suspend + *    mode, set COMMONONN to 1?b1.
+> > + * 4. Place the USB PHY in Suspend mode by setting SUSPENDM0 to 1?b0.
+> > + * 5. Set BYPASSSEL0 to 1?b1.
 > > + * 6. To transmit data, controls BYPASSDMEN0, and BYPASSDMDATA0.
 > > + * To receive data, monitor FSVPLUS0.
 > > + *
diff --git a/a/content_digest b/N1/content_digest
index 91d6afd..c208302 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,14 +1,9 @@
  "ref\01670829.9XWsDys3pl@phil\0"
  "ref\056CAF4DE.2060708@ti.com\0"
- "From\0Heiko Stuebner <heiko@sntech.de>\0"
- "Subject\0Re: [PATCH v5.1] phy: rockchip-usb: add handler for usb-uart functionality\0"
+ "From\0heiko@sntech.de (Heiko Stuebner)\0"
+ "Subject\0[PATCH v5.1] phy: rockchip-usb: add handler for usb-uart functionality\0"
  "Date\0Mon, 22 Feb 2016 12:53:21 +0100\0"
- "To\0Kishon Vijay Abraham I <kishon@ti.com>\0"
- "Cc\0linux-arm-kernel@lists.infradead.org"
-  linux-kernel@vger.kernel.org
-  linux-rockchip@lists.infradead.org
-  arnd@arndb.de
- " romain.perier@gmail.com\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "Am Montag, 22. Februar 2016, 17:15:34 schrieb Kishon Vijay Abraham I:\n"
@@ -385,13 +380,13 @@
  "> > +/*\n"
  "> > + * Enable the bypass of uart2 data through the otg usb phy.\n"
  "> > + * Original description in the TRM.\n"
- "> > + * 1. Disable the OTG block by setting OTGDISABLE0 to 1\342\200\231b1.\n"
+ "> > + * 1. Disable the OTG block by setting OTGDISABLE0 to 1?b1.\n"
  "> > + * 2. Disable the pull-up resistance on the D+ line by setting\n"
- "> > + *    OPMODE0[1:0] to 2\342\200\231b01.\n"
+ "> > + *    OPMODE0[1:0] to 2?b01.\n"
  "> > + * 3. To ensure that the XO, Bias, and PLL blocks are powered down in\n"
- "> > Suspend + *    mode, set COMMONONN to 1\342\200\231b1.\n"
- "> > + * 4. Place the USB PHY in Suspend mode by setting SUSPENDM0 to 1\342\200\231b0.\n"
- "> > + * 5. Set BYPASSSEL0 to 1\342\200\231b1.\n"
+ "> > Suspend + *    mode, set COMMONONN to 1?b1.\n"
+ "> > + * 4. Place the USB PHY in Suspend mode by setting SUSPENDM0 to 1?b0.\n"
+ "> > + * 5. Set BYPASSSEL0 to 1?b1.\n"
  "> > + * 6. To transmit data, controls BYPASSDMEN0, and BYPASSDMDATA0.\n"
  "> > + * To receive data, monitor FSVPLUS0.\n"
  "> > + *\n"
@@ -530,4 +525,4 @@
  "> >  MODULE_DESCRIPTION(\"Rockchip USB 2.0 PHY driver\");\n"
  "> >  MODULE_LICENSE(\"GPL v2\");"
 
-896ef34c209cdc97b5904fed810f4bdcae77eb5ac278e9afff3957a32d49f110
+416becc875a361797141bc4f749252528c92344d71f4b409ec448be864b04f1f

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