From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A5F6DE77197 for ; Sun, 5 Jan 2025 23:12:55 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4YRClG74vfz3cZd for ; Mon, 6 Jan 2025 10:12:42 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; arc=none smtp.remote-ip="2607:f8b0:4864:20::42c" ARC-Seal: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1734678439; cv=none; b=HcQs+0Ru8P24OnkLscp2aE54BakQ2WwPEZM+6C2FYoaCpjnjii402gw50hu6CBzFxc13g7YsXBudVaM7itX3GgzF/GWiI9GXYHYquU78ap0Q4L7EZMAshHcfIpO6FkoU82o2GoAH2pcElERo7tZACscqwo2zjGDty8IWn92PSqieRQQZGD9JhlTVQ9NsXD6dJConfI9LbfamtQn/eAcdG+9pWjK+7BTaVK+OycpCOkDvYN4i60nG+AN5D+dBXioXWALaiA4oeC7kJCA4bBFrrMCoC4DRxVMpqFTIn2JS3RU5ih0mPKv6CupDEmxeKoSuWpo9pexu9kNmYrR/+88imw== ARC-Message-Signature: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1734678439; c=relaxed/relaxed; bh=PEMd+ZCcjVyKhgZ//d+9H5Qp01LfwOiW7F0h4s2qi1A=; h=Content-Type:Message-ID:Date:MIME-Version:Subject:To:Cc: References:From:In-Reply-To; b=GDmeii+FtjJubr0V2bv4TmNB9Sb5aItnG3ohFqt5pKd6tmPom5AYnX5oTjpi/jmR534N8wV+6IABiXlJo7q2EWPUetbs3Y7MdfhIs2v/QvEi+EeYcNyiDNMGII0JCTDvOLIbzaG/jP7EcAuf3XxHpGrH/Y5Hsyd4V3klSsYsmfVr/RLDFbLqoKsGMKQ2xtazbbMTBk4459d5sUySUMJWmqeL92X0RWgGH79ySnwV/jqSn2kyYu0GpC4joE84QRjuwwrHqyrdaujOhcE/a0CRvLZfX/BrV4PysvapDqfBeSzaT+iA0DNlNf8fT9mB9c3IO0NHox5Hn8V03FUxIEql0g== ARC-Authentication-Results: i=1; lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=QqqdxRWV; dkim-atps=neutral; spf=pass (client-ip=2607:f8b0:4864:20::42c; helo=mail-pf1-x42c.google.com; envelope-from=a0987203069@gmail.com; receiver=lists.ozlabs.org) smtp.mailfrom=gmail.com Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=QqqdxRWV; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::42c; helo=mail-pf1-x42c.google.com; envelope-from=a0987203069@gmail.com; receiver=lists.ozlabs.org) Received: from mail-pf1-x42c.google.com (mail-pf1-x42c.google.com [IPv6:2607:f8b0:4864:20::42c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4YDz4j4krMz2xs7 for ; Fri, 20 Dec 2024 18:07:15 +1100 (AEDT) Received: by mail-pf1-x42c.google.com with SMTP id d2e1a72fcca58-725ee27e905so2036517b3a.2 for ; Thu, 19 Dec 2024 23:07:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734678431; x=1735283231; darn=lists.ozlabs.org; h=in-reply-to:from:content-language:references:cc:to:subject :user-agent:mime-version:date:message-id:from:to:cc:subject:date :message-id:reply-to; bh=PEMd+ZCcjVyKhgZ//d+9H5Qp01LfwOiW7F0h4s2qi1A=; b=QqqdxRWVAcHMIMoNsEHyl1azX48pnJOLLFNPxB9eH/wHfzgrarJFoHpfn0rFRefqmT nuzNZQa+3e/rV0u+cq1unSILfrg7xWLcld+87TfS5p7UcO8jydAcJ5UV0Dqz3gPPNOMO B/IZEeR5RTwNvVdzyWqEjAXMBr6PyHQ2bLd9mUdTrmE16u+pUv4/QkiSvPI9c/S6P0Ij /Bov5CCN0A6ysPDop0xpohKu7RLLWzD/dyLZ0YqnMEspeND0PxB/VnHbTZX8Hcz4JHVs JOFrWfLhHKWvAQNL7EoFzwMJlq+hEGivHPXOYcEMhd0fejKtlsMRgO19evTUbhLvj2CT qhLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734678431; x=1735283231; h=in-reply-to:from:content-language:references:cc:to:subject :user-agent:mime-version:date:message-id:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=PEMd+ZCcjVyKhgZ//d+9H5Qp01LfwOiW7F0h4s2qi1A=; b=d5AztZ23zMXYCsmVrjzsh8BhtApQj6k/l3CZpGuqNkUmkVOoEvKv9rVF2tP7TawApi 6NmaNLlFWTQ3JjNaX/nzyc1Q4m5s+ibgb24qpx2em6xcPaV7QH8eDqSRAQEF3n9l9l8j HTt3XQoVf39eGAKNKqkX3wT3EJ3oU1veuhsO4LQejI41F9JGKb51ihkDzJypuuxG/msj pz7Fg9i3TCyBGDXLg0aiPkIypznMmBi23Au7rFkrkHcqlrNXIsSz+ymJMcCGSmFNwnhp RyR5sxH2/PPTiSxdOZYzogxL2uzHt2KP4SFrindFmEDFg/FK63WmmnwrzWuMdkGFMjJK 8Ewg== X-Forwarded-Encrypted: i=1; AJvYcCVmCQ6q0M3AZkvuybBmndMpn2wEFp5jsQqq66bx+2FkbacI/RsmA0WFcBxBRxp6ijcDxRPFSZkU@lists.ozlabs.org X-Gm-Message-State: AOJu0YzZ2sfvR0dNwU0Qr1eexEjfwrgmvkWZFM3n57ZS+2ZQYsYo2Hd1 umVflF0pXnA6MAZB3jSblWaGA42twQWm/HiN9Urntja5+whKhr2y X-Gm-Gg: ASbGncuYALXi20G2rDYbY+2QAZ7xJWr1g8FQddvZpJ6fHP84xNRLJl3wEtxBuF2rfYc Khi7ZmuCfWiF41sG8Dwz61t3LmNSZRzd4s/VS8M0yhFShd7Z/q0KFABw3vSyh50Ox5+CYwCl+Sh Q8QSSPb1pSdkL1x1mdQvZ9m3xXkx68RyaP7v1jz77CPAMPQyPnOmYOIU3R8yAMpCe+QYEwFO53k gNglFoUccF0MtVQyD0yb/h+mpyuZaJvYzGhqygPGVhW0mkuMsqy2NI87Ir2W6xbXeelAKz/npH9 0qiKVHUTCqMfcViHaRDeJbUWGQF3R4Xcuoo= X-Google-Smtp-Source: AGHT+IEaoCcbwPWwR8Ti3oa7l/Mq+jAqCRd0p58CA/VVjA6ygI8K1jwyLafu9oTcFKQj2PeOnzXDbg== X-Received: by 2002:a05:6a21:350f:b0:1db:eff0:6ae7 with SMTP id adf61e73a8af0-1e5e0802290mr3304170637.33.1734678431417; Thu, 19 Dec 2024 23:07:11 -0800 (PST) Received: from [192.168.0.100] (60-250-196-139.hinet-ip.hinet.net. [60.250.196.139]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-842b821da75sm1896744a12.36.2024.12.19.23.07.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 19 Dec 2024 23:07:11 -0800 (PST) Content-Type: multipart/alternative; boundary="------------RxXukmybidVLR5d4O2xu8iTv" Message-ID: <216e7c97-e0b1-4833-b344-a71834020b15@gmail.com> Date: Fri, 20 Dec 2024 15:07:04 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 3/3] net: stmmac: dwmac-nuvoton: Add dwmac glue for Nuvoton MA35 family To: Przemek Kitszel References: <20241218114442.137884-1-a0987203069@gmail.com> <20241218114442.137884-4-a0987203069@gmail.com> <7a4f5769-0010-40fd-8bb7-a20f2725114f@intel.com> Content-Language: en-US From: Joey Lu In-Reply-To: <7a4f5769-0010-40fd-8bb7-a20f2725114f@intel.com> X-Mailman-Approved-At: Mon, 06 Jan 2025 10:12:37 +1100 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alexandre.torgue@foss.st.com, edumazet@google.com, schung@nuvoton.com, yclu4@nuvoton.com, linux-stm32@st-md-mailman.stormreply.com, robh@kernel.org, openbmc@lists.ozlabs.org, joabreu@synopsys.com, kuba@kernel.org, pabeni@redhat.com, devicetree@vger.kernel.org, ychuang3@nuvoton.com, richardcochran@gmail.com, peppe.cavallaro@st.com, linux-arm-kernel@lists.infradead.org, conor+dt@kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, andrew+netdev@lunn.ch, mcoquelin.stm32@gmail.com, krzk+dt@kernel.org, davem@davemloft.net Errors-To: openbmc-bounces+openbmc=archiver.kernel.org@lists.ozlabs.org Sender: "openbmc" This is a multi-part message in MIME format. --------------RxXukmybidVLR5d4O2xu8iTv Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Dear Przemek, Thank you for your reply. Przemek Kitszel 於 12/18/2024 9:26 PM 寫道: > On 12/18/24 12:44, Joey Lu wrote: >> Add support for Gigabit Ethernet on Nuvoton MA35 series using dwmac >> driver. >> >> Signed-off-by: Joey Lu >> --- >>   drivers/net/ethernet/stmicro/stmmac/Kconfig   |  11 ++ >>   drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 + >>   .../ethernet/stmicro/stmmac/dwmac-nuvoton.c   | 182 ++++++++++++++++++ >>   3 files changed, 194 insertions(+) >>   create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c >> >> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig >> b/drivers/net/ethernet/stmicro/stmmac/Kconfig >> index 6658536a4e17..c8cbc0ec1311 100644 >> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig >> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig >> @@ -121,6 +121,17 @@ config DWMAC_MESON >>         the stmmac device driver. This driver is used for Meson6, >>         Meson8, Meson8b and GXBB SoCs. >>   +config DWMAC_NUVOTON >> +    tristate "Nuvoton MA35 dwmac support" >> +    default ARCH_MA35 >> +    depends on OF && (ARCH_MA35 || COMPILE_TEST) >> +    select MFD_SYSCON >> +    help >> +      Support for Ethernet controller on Nuvoton MA35 series SoC. >> + >> +      This selects the Nuvoton MA35 series SoC glue layer support >> +      for the stmmac device driver. >> + >>   config DWMAC_QCOM_ETHQOS >>       tristate "Qualcomm ETHQOS support" >>       default ARCH_QCOM >> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile >> b/drivers/net/ethernet/stmicro/stmmac/Makefile >> index 2389fd261344..9812b824459f 100644 >> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile >> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile >> @@ -19,6 +19,7 @@ obj-$(CONFIG_DWMAC_IPQ806X)    += dwmac-ipq806x.o >>   obj-$(CONFIG_DWMAC_LPC18XX)    += dwmac-lpc18xx.o >>   obj-$(CONFIG_DWMAC_MEDIATEK)    += dwmac-mediatek.o >>   obj-$(CONFIG_DWMAC_MESON)    += dwmac-meson.o dwmac-meson8b.o >> +obj-$(CONFIG_DWMAC_NUVOTON)    += dwmac-nuvoton.o >>   obj-$(CONFIG_DWMAC_QCOM_ETHQOS)    += dwmac-qcom-ethqos.o >>   obj-$(CONFIG_DWMAC_ROCKCHIP)    += dwmac-rk.o >>   obj-$(CONFIG_DWMAC_RZN1)    += dwmac-rzn1.o >> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c >> b/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c >> new file mode 100644 >> index 000000000000..c5b8933c1f44 >> --- /dev/null >> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c >> @@ -0,0 +1,182 @@ >> +// SPDX-License-Identifier: GPL-2.0-only >> +/* >> + * Nuvoton DWMAC specific glue layer >> + * >> + * Copyright (C) 2024 Nuvoton Technology Corp. >> + * >> + * Author: Joey Lu >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#include "stmmac.h" >> +#include "stmmac_platform.h" >> + >> +#define REG_SYS_GMAC0MISCR  0x108 >> +#define REG_SYS_GMAC1MISCR  0x10C >> + >> +#define MISCR_RMII          BIT(0) >> + >> +/* 2000ps is mapped to 0 ~ 0xF */ >> +#define PATH_DELAY_DEC      134 > > would be great to previx your macros by NVT_ Got it. > > why 134 and not 125? The interval is confirmed to be 134. The mapping is as follows: |0000| = 0.00 ns |0001| = 0.13 ns |0010| = 0.27 ns ... |1111| = 2.00 ns > >> +#define TX_DELAY_OFFSET     16 > > please remove and replace the usage point by FIELD_PREP() Got it. > >> +#define TX_DELAY_MASK       GENMASK(19, 16) >> +#define RX_DELAY_OFFSET     20 > > ditto Got it. > >> +#define RX_DELAY_MASK       GENMASK(23, 20) >> + >> +struct nvt_priv_data { >> +    struct platform_device *pdev; >> +    struct regmap *regmap; >> +}; >> + >> +static struct nvt_priv_data * >> +nuvoton_gmac_setup(struct platform_device *pdev, struct >> plat_stmmacenet_data *plat) > > please stick to one previx for all functions, structs, and defines, > NVT/nvt looks good > s/nuvoton/nvt/ Okay. I will use nvt as the prefix > >> +{ >> +    struct device *dev = &pdev->dev; >> +    struct nvt_priv_data *bsp_priv; >> +    phy_interface_t phy_mode; >> +    u32 tx_delay, rx_delay; >> +    u32 macid, arg, reg; >> + >> +    bsp_priv = devm_kzalloc(dev, sizeof(*bsp_priv), GFP_KERNEL); >> +    if (!bsp_priv) >> +        return ERR_PTR(-ENOMEM); >> + >> +    bsp_priv->regmap = >> +        syscon_regmap_lookup_by_phandle_args(dev->of_node, >> "nuvoton,sys", 1, &macid); >> +    if (IS_ERR(bsp_priv->regmap)) { >> +        dev_err_probe(dev, PTR_ERR(bsp_priv->regmap), "Failed to get >> sys register\n"); >> +        return ERR_PTR(-ENODEV); >> +    } >> +    if (macid > 1) { >> +        dev_err_probe(dev, -EINVAL, "Invalid sys arguments\n"); >> +        return ERR_PTR(-EINVAL); >> +    } >> + >> +    if (of_property_read_u32(dev->of_node, "tx-internal-delay-ps", >> &arg)) { >> +        tx_delay = 0; /* Default value is 0 */ > > please remove obvious comments Got it. > >> +    } else { >> +        if (arg <= 2000) { >> +            tx_delay = (arg == 2000) ? 0xF : (arg / PATH_DELAY_DEC); >> +            dev_dbg(dev, "Set Tx path delay to 0x%x\n", tx_delay); >> +        } else { >> +            dev_err(dev, "Invalid Tx path delay argument.\n"); >> +            return ERR_PTR(-EINVAL); >> +        } >> +    } >> +    if (of_property_read_u32(dev->of_node, "rx-internal-delay-ps", >> &arg)) { >> +        rx_delay = 0; /* Default value is 0 */ >> +    } else { >> +        if (arg <= 2000) { >> +            rx_delay = (arg == 2000) ? 0xF : (arg / PATH_DELAY_DEC); >> +            dev_dbg(dev, "Set Rx path delay to 0x%x\n", rx_delay); >> +        } else { >> +            dev_err(dev, "Invalid Rx path delay argument.\n"); >> +            return ERR_PTR(-EINVAL); >> +        } >> +    } >> + >> +    regmap_read(bsp_priv->regmap, >> +            macid == 0 ? REG_SYS_GMAC0MISCR : REG_SYS_GMAC1MISCR, >> ®); >> +    reg &= ~(TX_DELAY_MASK | RX_DELAY_MASK); >> + >> +    if (of_get_phy_mode(pdev->dev.of_node, &phy_mode)) { >> +        dev_err(dev, "missing phy mode property\n"); >> +        return ERR_PTR(-EINVAL); >> +    } >> + >> +    switch (phy_mode) { >> +    case PHY_INTERFACE_MODE_RGMII: >> +    case PHY_INTERFACE_MODE_RGMII_ID: >> +    case PHY_INTERFACE_MODE_RGMII_RXID: >> +    case PHY_INTERFACE_MODE_RGMII_TXID: >> +        reg &= ~MISCR_RMII; >> +        break; >> +    case PHY_INTERFACE_MODE_RMII: >> +        reg |= MISCR_RMII; >> +        break; >> +    default: >> +        dev_err(dev, "Unsupported phy-mode (%d)\n", phy_mode); >> +        return ERR_PTR(-EINVAL); >> +    } >> + >> +    if (!(reg & MISCR_RMII)) { >> +        reg |= tx_delay << TX_DELAY_OFFSET; >> +        reg |= rx_delay << RX_DELAY_OFFSET; >> +    } >> + >> +    regmap_write(bsp_priv->regmap, >> +             macid == 0 ? REG_SYS_GMAC0MISCR : REG_SYS_GMAC1MISCR, >> reg); >> + >> +    bsp_priv->pdev = pdev; >> + >> +    return bsp_priv; >> +} >> + >> +static int nuvoton_gmac_probe(struct platform_device *pdev) >> +{ >> +    struct plat_stmmacenet_data *plat_dat; >> +    struct stmmac_resources stmmac_res; >> +    int ret; >> + >> +    ret = stmmac_get_platform_resources(pdev, &stmmac_res); >> +    if (ret) >> +        return ret; >> + >> +    plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac); >> +    if (IS_ERR(plat_dat)) >> +        return PTR_ERR(plat_dat); >> + >> +    /* Nuvoton DWMAC configs */ >> +    plat_dat->has_gmac = 1; >> +    plat_dat->tx_fifo_size = 2048; >> +    plat_dat->rx_fifo_size = 4096; >> +    plat_dat->multicast_filter_bins = 0; >> +    plat_dat->unicast_filter_entries = 8; >> +    plat_dat->flags &= ~STMMAC_FLAG_USE_PHY_WOL; >> + >> +    plat_dat->bsp_priv = nuvoton_gmac_setup(pdev, plat_dat); > > would be great to extend plat_stmmacenet_data allocation to allocate > also the space for the priv data - but this is outside of the scope > of this patchset You're right, this is a misuse and will be corrected. > >> +    if (IS_ERR(plat_dat->bsp_priv)) { >> +        ret = PTR_ERR(plat_dat->bsp_priv); >> +        return ret; > > just return PTR_ERR(...) Got it. > >> +    } >> + >> +    ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); >> +    if (ret) >> +        return ret; >> + >> +    /* The PMT flag is determined by the RWK property. >> +     * However, our hardware is configured to support only MGK. >> +     * This is an override on PMT to enable WoL capability. >> +     */ >> +    plat_dat->pmt = 1; >> +    device_set_wakeup_capable(&pdev->dev, 1); >> + >> +    return 0; >> +} >> + >> +static const struct of_device_id nuvoton_dwmac_match[] = { >> +    { .compatible = "nuvoton,ma35d1-dwmac"}, >> +    { } >> +}; >> +MODULE_DEVICE_TABLE(of, nuvoton_dwmac_match); >> + >> +static struct platform_driver nuvoton_dwmac_driver = { >> +    .probe  = nuvoton_gmac_probe, >> +    .remove = stmmac_pltfr_remove, >> +    .driver = { >> +        .name           = "nuvoton-dwmac", >> +        .pm        = &stmmac_pltfr_pm_ops, >> +        .of_match_table = nuvoton_dwmac_match, >> +    }, >> +}; >> +module_platform_driver(nuvoton_dwmac_driver); >> + >> +MODULE_AUTHOR("Joey Lu "); >> +MODULE_DESCRIPTION("Nuvoton DWMAC specific glue layer"); >> +MODULE_LICENSE("GPL v2"); > Thanks! BR, Joey --------------RxXukmybidVLR5d4O2xu8iTv Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 8bit

Dear Przemek,

Thank you for your reply.

Przemek Kitszel 於 12/18/2024 9:26 PM 寫道:
On 12/18/24 12:44, Joey Lu wrote:
Add support for Gigabit Ethernet on Nuvoton MA35 series using dwmac driver.

Signed-off-by: Joey Lu <a0987203069@gmail.com>
---
  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  11 ++
  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
  .../ethernet/stmicro/stmmac/dwmac-nuvoton.c   | 182 ++++++++++++++++++
  3 files changed, 194 insertions(+)
  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c

diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index 6658536a4e17..c8cbc0ec1311 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -121,6 +121,17 @@ config DWMAC_MESON
        the stmmac device driver. This driver is used for Meson6,
        Meson8, Meson8b and GXBB SoCs.
  +config DWMAC_NUVOTON
+    tristate "Nuvoton MA35 dwmac support"
+    default ARCH_MA35
+    depends on OF && (ARCH_MA35 || COMPILE_TEST)
+    select MFD_SYSCON
+    help
+      Support for Ethernet controller on Nuvoton MA35 series SoC.
+
+      This selects the Nuvoton MA35 series SoC glue layer support
+      for the stmmac device driver.
+
  config DWMAC_QCOM_ETHQOS
      tristate "Qualcomm ETHQOS support"
      default ARCH_QCOM
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 2389fd261344..9812b824459f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_DWMAC_IPQ806X)    += dwmac-ipq806x.o
  obj-$(CONFIG_DWMAC_LPC18XX)    += dwmac-lpc18xx.o
  obj-$(CONFIG_DWMAC_MEDIATEK)    += dwmac-mediatek.o
  obj-$(CONFIG_DWMAC_MESON)    += dwmac-meson.o dwmac-meson8b.o
+obj-$(CONFIG_DWMAC_NUVOTON)    += dwmac-nuvoton.o
  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)    += dwmac-qcom-ethqos.o
  obj-$(CONFIG_DWMAC_ROCKCHIP)    += dwmac-rk.o
  obj-$(CONFIG_DWMAC_RZN1)    += dwmac-rzn1.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c
new file mode 100644
index 000000000000..c5b8933c1f44
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c
@@ -0,0 +1,182 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Nuvoton DWMAC specific glue layer
+ *
+ * Copyright (C) 2024 Nuvoton Technology Corp.
+ *
+ * Author: Joey Lu <yclu4@nuvoton.com>
+ */
+
+#include <linux/mfd/syscon.h>
+#include <linux/of_device.h>
+#include <linux/of_net.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/stmmac.h>
+
+#include "stmmac.h"
+#include "stmmac_platform.h"
+
+#define REG_SYS_GMAC0MISCR  0x108
+#define REG_SYS_GMAC1MISCR  0x10C
+
+#define MISCR_RMII          BIT(0)
+
+/* 2000ps is mapped to 0 ~ 0xF */
+#define PATH_DELAY_DEC      134

would be great to previx your macros by NVT_
Got it.

why 134 and not 125?

The interval is confirmed to be 134. The mapping is as follows:

0000 = 0.00 ns
0001 = 0.13 ns
0010 = 0.27 ns
...
1111 = 2.00 ns

+#define TX_DELAY_OFFSET     16

please remove and replace the usage point by FIELD_PREP()
Got it.

+#define TX_DELAY_MASK       GENMASK(19, 16)
+#define RX_DELAY_OFFSET     20

ditto
Got it.

+#define RX_DELAY_MASK       GENMASK(23, 20)
+
+struct nvt_priv_data {
+    struct platform_device *pdev;
+    struct regmap *regmap;
+};
+
+static struct nvt_priv_data *
+nuvoton_gmac_setup(struct platform_device *pdev, struct plat_stmmacenet_data *plat)

please stick to one previx for all functions, structs, and defines,
NVT/nvt looks good
s/nuvoton/nvt/
Okay. I will use nvt as the prefix

+{
+    struct device *dev = &pdev->dev;
+    struct nvt_priv_data *bsp_priv;
+    phy_interface_t phy_mode;
+    u32 tx_delay, rx_delay;
+    u32 macid, arg, reg;
+
+    bsp_priv = devm_kzalloc(dev, sizeof(*bsp_priv), GFP_KERNEL);
+    if (!bsp_priv)
+        return ERR_PTR(-ENOMEM);
+
+    bsp_priv->regmap =
+        syscon_regmap_lookup_by_phandle_args(dev->of_node, "nuvoton,sys", 1, &macid);
+    if (IS_ERR(bsp_priv->regmap)) {
+        dev_err_probe(dev, PTR_ERR(bsp_priv->regmap), "Failed to get sys register\n");
+        return ERR_PTR(-ENODEV);
+    }
+    if (macid > 1) {
+        dev_err_probe(dev, -EINVAL, "Invalid sys arguments\n");
+        return ERR_PTR(-EINVAL);
+    }
+
+    if (of_property_read_u32(dev->of_node, "tx-internal-delay-ps", &arg)) {
+        tx_delay = 0; /* Default value is 0 */

please remove obvious comments
Got it.

+    } else {
+        if (arg <= 2000) {
+            tx_delay = (arg == 2000) ? 0xF : (arg / PATH_DELAY_DEC);
+            dev_dbg(dev, "Set Tx path delay to 0x%x\n", tx_delay);
+        } else {
+            dev_err(dev, "Invalid Tx path delay argument.\n");
+            return ERR_PTR(-EINVAL);
+        }
+    }
+    if (of_property_read_u32(dev->of_node, "rx-internal-delay-ps", &arg)) {
+        rx_delay = 0; /* Default value is 0 */
+    } else {
+        if (arg <= 2000) {
+            rx_delay = (arg == 2000) ? 0xF : (arg / PATH_DELAY_DEC);
+            dev_dbg(dev, "Set Rx path delay to 0x%x\n", rx_delay);
+        } else {
+            dev_err(dev, "Invalid Rx path delay argument.\n");
+            return ERR_PTR(-EINVAL);
+        }
+    }
+
+    regmap_read(bsp_priv->regmap,
+            macid == 0 ? REG_SYS_GMAC0MISCR : REG_SYS_GMAC1MISCR, &reg);
+    reg &= ~(TX_DELAY_MASK | RX_DELAY_MASK);
+
+    if (of_get_phy_mode(pdev->dev.of_node, &phy_mode)) {
+        dev_err(dev, "missing phy mode property\n");
+        return ERR_PTR(-EINVAL);
+    }
+
+    switch (phy_mode) {
+    case PHY_INTERFACE_MODE_RGMII:
+    case PHY_INTERFACE_MODE_RGMII_ID:
+    case PHY_INTERFACE_MODE_RGMII_RXID:
+    case PHY_INTERFACE_MODE_RGMII_TXID:
+        reg &= ~MISCR_RMII;
+        break;
+    case PHY_INTERFACE_MODE_RMII:
+        reg |= MISCR_RMII;
+        break;
+    default:
+        dev_err(dev, "Unsupported phy-mode (%d)\n", phy_mode);
+        return ERR_PTR(-EINVAL);
+    }
+
+    if (!(reg & MISCR_RMII)) {
+        reg |= tx_delay << TX_DELAY_OFFSET;
+        reg |= rx_delay << RX_DELAY_OFFSET;
+    }
+
+    regmap_write(bsp_priv->regmap,
+             macid == 0 ? REG_SYS_GMAC0MISCR : REG_SYS_GMAC1MISCR, reg);
+
+    bsp_priv->pdev = pdev;
+
+    return bsp_priv;
+}
+
+static int nuvoton_gmac_probe(struct platform_device *pdev)
+{
+    struct plat_stmmacenet_data *plat_dat;
+    struct stmmac_resources stmmac_res;
+    int ret;
+
+    ret = stmmac_get_platform_resources(pdev, &stmmac_res);
+    if (ret)
+        return ret;
+
+    plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);
+    if (IS_ERR(plat_dat))
+        return PTR_ERR(plat_dat);
+
+    /* Nuvoton DWMAC configs */
+    plat_dat->has_gmac = 1;
+    plat_dat->tx_fifo_size = 2048;
+    plat_dat->rx_fifo_size = 4096;
+    plat_dat->multicast_filter_bins = 0;
+    plat_dat->unicast_filter_entries = 8;
+    plat_dat->flags &= ~STMMAC_FLAG_USE_PHY_WOL;
+
+    plat_dat->bsp_priv = nuvoton_gmac_setup(pdev, plat_dat);

would be great to extend plat_stmmacenet_data allocation to allocate
also the space for the priv data - but this is outside of the scope
of this patchset

You're right, this is a misuse and will be corrected.


+    if (IS_ERR(plat_dat->bsp_priv)) {
+        ret = PTR_ERR(plat_dat->bsp_priv);
+        return ret;

just return PTR_ERR(...)
Got it.

+    }
+
+    ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+    if (ret)
+        return ret;
+
+    /* The PMT flag is determined by the RWK property.
+     * However, our hardware is configured to support only MGK.
+     * This is an override on PMT to enable WoL capability.
+     */
+    plat_dat->pmt = 1;
+    device_set_wakeup_capable(&pdev->dev, 1);
+
+    return 0;
+}
+
+static const struct of_device_id nuvoton_dwmac_match[] = {
+    { .compatible = "nuvoton,ma35d1-dwmac"},
+    { }
+};
+MODULE_DEVICE_TABLE(of, nuvoton_dwmac_match);
+
+static struct platform_driver nuvoton_dwmac_driver = {
+    .probe  = nuvoton_gmac_probe,
+    .remove = stmmac_pltfr_remove,
+    .driver = {
+        .name           = "nuvoton-dwmac",
+        .pm        = &stmmac_pltfr_pm_ops,
+        .of_match_table = nuvoton_dwmac_match,
+    },
+};
+module_platform_driver(nuvoton_dwmac_driver);
+
+MODULE_AUTHOR("Joey Lu <yclu4@nuvoton.com>");
+MODULE_DESCRIPTION("Nuvoton DWMAC specific glue layer");
+MODULE_LICENSE("GPL v2");

Thanks!

BR,

Joey

--------------RxXukmybidVLR5d4O2xu8iTv--