From: <Tudor.Ambarus@microchip.com>
To: <jaimeliao.tw@gmail.com>, <u-boot@lists.denx.de>,
<jagan@amarulasolutions.com>, <vigneshr@ti.com>,
<miquel.raynal@bootlin.com>
Cc: <zhengxunli@mxic.com.tw>, <jaimeliao@mxic.com.tw>
Subject: Re: [PATCH] mtd: spi-nor: Parse SFDP Command Sequence to change to Octal DDR(8D-8D-8D) mode
Date: Thu, 10 Mar 2022 09:33:06 +0000 [thread overview]
Message-ID: <217ec3b6-ece2-d681-63bf-e9c4f7dbc1c4@microchip.com> (raw)
In-Reply-To: <20220310065909.354-1-jaimeliao.tw@gmail.com>
Hi,
On 3/10/22 08:59, JaimeLiao wrote:
> +static int spi_nor_generall_octal_dtr_enable(struct spi_nor *nor)
Is there a disable method too? If not, can we deduce it?
Cheers,
ta
next prev parent reply other threads:[~2022-03-10 9:33 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-10 6:59 [PATCH] mtd: spi-nor: Parse SFDP Command Sequence to change to Octal DDR(8D-8D-8D) mode JaimeLiao
2022-03-10 9:33 ` Tudor.Ambarus [this message]
2022-03-15 8:45 ` liao jaime
2022-03-15 18:40 ` Tudor.Ambarus
2022-03-16 2:41 ` liao jaime
2022-03-16 3:45 ` Tudor.Ambarus
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