Re: [PATCH 2/3] i2c: designware: Enable transfer with different target addresses

["Benoît Monin" <benoit.monin@bootlin.com>]

Hello Hans,

On Monday, 20 October 2025 at 11:38:38 CEST, Hans Verkuil wrote:
> Hi Benoît,
> 
> On 17/10/2025 16:59, Benoît Monin wrote:
> > When i2c_dw_xfer() is called with more than one message, it sets the
> > target address according to the first message. If any of the following
> > messages have a different target address, the transfer finishes with
> > an error.
> > 
> > Instead, if the next message has a different target address, wait until
> > all previous messages are sent and the STOP condition is detected. This
> > will complete the current part of the transfer. The next part is then
> > handled by looping in i2c_dw_xfer(), calling i2c_dw_xfer_init() and
> > i2c_dw_wait_transfer() until all messages of the transfer have been
> > processed, or an error is detected.
> > 
> > The RESTART bit is now set after the first message of each part of the
> > transfer, instead of just after the very first message of the whole
> > transfer.
> > 
> > For each address change, i2c_dw_xfer_init() is called, which takes care
> > of disabling the adapter before changing the target address register,
> > then re-enabling it. Given that we cannot know the value of the
> > I2C_DYNAMIC_TAR_UPDATE parameter, this is the only sure way to change
> > the target address.
> 
> I have the problem described here:
> 
> https://lore.kernel.org/linux-i2c/ee6afdd7-3117-43cd-831f-e0ec5ee46f46@kernel.org/
> 
> And it looks like this patch is intended to solve that problem (one transaction
> with two writes to different target addresses).
> 
> I tried this patch, but it doesn't work. Instead I get a time out:
> 
> [  111.695238] i2c_designware 1f00074000.i2c: controller timed out
> 
> Is it indeed meant to solve the problem I have or is it addressing another
> issue?
> 
For your particular case, that will not help reaching the other segments as
we wait for a STOP before changing the target address. So, it should not
fail but do a write to segment 0 in your eeprom.

> I'm happy to help test patches.
> 
Can you enable debug in i2c-designware-master to see which transaction
is failing?

Best regards,
-- 
Benoît Monin, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com