* [PATCH 1/2] sh_eth: get rid of 'sh_eth_cpu_data::shift_rd0'
2017-01-06 21:01 [PATCH 0/2] sh_eth: "intgelligent checksum" related cleanups Sergei Shtylyov
@ 2017-01-06 21:02 ` Sergei Shtylyov
2017-01-06 21:03 ` [PATCH 2/2] sh_eth: rename 'sh_eth_cpu_data::hw_crc' Sergei Shtylyov
2017-01-09 20:41 ` [PATCH 0/2] sh_eth: "intgelligent checksum" related cleanups David Miller
2 siblings, 0 replies; 4+ messages in thread
From: Sergei Shtylyov @ 2017-01-06 21:02 UTC (permalink / raw)
To: netdev; +Cc: linux-renesas-soc
After checking all the available manuals, I have enough information to
conclude that the 'shift_rd0' flag is only relevant for the Ether cores
supporting so called "intelligent checksum" (and hence having CSMR) which
is indicated by the 'hw_crc' flag. Since all the relevant SoCs now have
both these flags set, we can at last get rid of the former flag...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
drivers/net/ethernet/renesas/sh_eth.c | 5 +----
drivers/net/ethernet/renesas/sh_eth.h | 1 -
2 files changed, 1 insertion(+), 5 deletions(-)
Index: net/drivers/net/ethernet/renesas/sh_eth.c
===================================================================
--- net.orig/drivers/net/ethernet/renesas/sh_eth.c
+++ net/drivers/net/ethernet/renesas/sh_eth.c
@@ -537,7 +537,6 @@ static struct sh_eth_cpu_data r7s72100_d
.no_ade = 1,
.hw_crc = 1,
.tsu = 1,
- .shift_rd0 = 1,
};
static void sh_eth_chip_reset_r8a7740(struct net_device *ndev)
@@ -577,7 +576,6 @@ static struct sh_eth_cpu_data r8a7740_da
.hw_crc = 1,
.tsu = 1,
.select_mii = 1,
- .shift_rd0 = 1,
};
/* There is CPU dependent code */
@@ -820,7 +818,6 @@ static struct sh_eth_cpu_data sh7734_dat
.tsu = 1,
.hw_crc = 1,
.select_mii = 1,
- .shift_rd0 = 1,
};
/* SH7763 */
@@ -1421,7 +1418,7 @@ static int sh_eth_rx(struct net_device *
* the RFS bits are from bit 25 to bit 16. So, the
* driver needs right shifting by 16.
*/
- if (mdp->cd->shift_rd0)
+ if (mdp->cd->hw_crc)
desc_status >>= 16;
skb = mdp->rx_skbuff[entry];
Index: net/drivers/net/ethernet/renesas/sh_eth.h
===================================================================
--- net.orig/drivers/net/ethernet/renesas/sh_eth.h
+++ net/drivers/net/ethernet/renesas/sh_eth.h
@@ -490,7 +490,6 @@ struct sh_eth_cpu_data {
unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */
unsigned hw_crc:1; /* E-DMAC have CSMR */
unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */
- unsigned shift_rd0:1; /* shift Rx descriptor word 0 right by 16 */
unsigned rmiimode:1; /* EtherC has RMIIMODE register */
unsigned rtrate:1; /* EtherC has RTRATE register */
};
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH 2/2] sh_eth: rename 'sh_eth_cpu_data::hw_crc'
2017-01-06 21:01 [PATCH 0/2] sh_eth: "intgelligent checksum" related cleanups Sergei Shtylyov
2017-01-06 21:02 ` [PATCH 1/2] sh_eth: get rid of 'sh_eth_cpu_data::shift_rd0' Sergei Shtylyov
@ 2017-01-06 21:03 ` Sergei Shtylyov
2017-01-09 20:41 ` [PATCH 0/2] sh_eth: "intgelligent checksum" related cleanups David Miller
2 siblings, 0 replies; 4+ messages in thread
From: Sergei Shtylyov @ 2017-01-06 21:03 UTC (permalink / raw)
To: netdev; +Cc: linux-renesas-soc
The 'struct sh_eth_cpu_data' field indicating the "intelligent checksum"
support was misnamed 'hw_crc' -- rename it to 'hw_checksum'.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
drivers/net/ethernet/renesas/sh_eth.c | 12 ++++++------
drivers/net/ethernet/renesas/sh_eth.h | 2 +-
2 files changed, 7 insertions(+), 7 deletions(-)
Index: net/drivers/net/ethernet/renesas/sh_eth.c
===================================================================
--- net.orig/drivers/net/ethernet/renesas/sh_eth.c
+++ net/drivers/net/ethernet/renesas/sh_eth.c
@@ -535,7 +535,7 @@ static struct sh_eth_cpu_data r7s72100_d
.rpadir_value = 2 << 16,
.no_trimd = 1,
.no_ade = 1,
- .hw_crc = 1,
+ .hw_checksum = 1,
.tsu = 1,
};
@@ -573,7 +573,7 @@ static struct sh_eth_cpu_data r8a7740_da
.rpadir_value = 2 << 16,
.no_trimd = 1,
.no_ade = 1,
- .hw_crc = 1,
+ .hw_checksum = 1,
.tsu = 1,
.select_mii = 1,
};
@@ -816,7 +816,7 @@ static struct sh_eth_cpu_data sh7734_dat
.no_trimd = 1,
.no_ade = 1,
.tsu = 1,
- .hw_crc = 1,
+ .hw_checksum = 1,
.select_mii = 1,
};
@@ -933,7 +933,7 @@ static int sh_eth_reset(struct net_devic
sh_eth_write(ndev, 0x0, RDFFR);
/* Reset HW CRC register */
- if (mdp->cd->hw_crc)
+ if (mdp->cd->hw_checksum)
sh_eth_write(ndev, 0x0, CSMR);
/* Select MII mode */
@@ -1418,7 +1418,7 @@ static int sh_eth_rx(struct net_device *
* the RFS bits are from bit 25 to bit 16. So, the
* driver needs right shifting by 16.
*/
- if (mdp->cd->hw_crc)
+ if (mdp->cd->hw_checksum)
desc_status >>= 16;
skb = mdp->rx_skbuff[entry];
@@ -1986,7 +1986,7 @@ static size_t __sh_eth_get_regs(struct n
add_reg(MAFCR);
if (cd->rtrate)
add_reg(RTRATE);
- if (cd->hw_crc)
+ if (cd->hw_checksum)
add_reg(CSMR);
if (cd->select_mii)
add_reg(RMII_MII);
Index: net/drivers/net/ethernet/renesas/sh_eth.h
===================================================================
--- net.orig/drivers/net/ethernet/renesas/sh_eth.h
+++ net/drivers/net/ethernet/renesas/sh_eth.h
@@ -488,7 +488,7 @@ struct sh_eth_cpu_data {
unsigned rpadir:1; /* E-DMAC have RPADIR */
unsigned no_trimd:1; /* E-DMAC DO NOT have TRIMD */
unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */
- unsigned hw_crc:1; /* E-DMAC have CSMR */
+ unsigned hw_checksum:1; /* E-DMAC has CSMR */
unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */
unsigned rmiimode:1; /* EtherC has RMIIMODE register */
unsigned rtrate:1; /* EtherC has RTRATE register */
^ permalink raw reply [flat|nested] 4+ messages in thread