From: Krzysztof Kozlowski <krzk@kernel.org>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: "Prabhakar Mahadev Lad" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
"Jonathan Cameron" <jic23@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
"Daniel Lezcano" <daniel.lezcano@kernel.org>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"magnus.damm" <magnus.damm@gmail.com>,
"David Lechner" <dlechner@baylibre.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Claudiu Beznea" <claudiu.beznea.uj@bp.renesas.com>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
"linux-iio@vger.kernel.org" <linux-iio@vger.kernel.org>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"Chris Paterson" <Chris.Paterson2@renesas.com>
Subject: Re: [PATCH v3 5/8] dt-bindings: iio: adc: renesas,rzg2l-adc: Document RZ/G3L ADC for TSU
Date: Mon, 28 Sep 2026 08:27:24 +0200 [thread overview]
Message-ID: <22665427-69de-4402-b4da-947ffeba9f9f@kernel.org> (raw)
In-Reply-To: <TY3PR01MB11346192394192932538FABD3868D2@TY3PR01MB11346.jpnprd01.prod.outlook.com>
On 28/09/2026 08:25, Biju Das wrote:
> Hi Krzysztof Kozlowski,
>
> Thanks for the feedback.
>
>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzk@kernel.org>
>> Sent: 28 September 2026 07:05
>> Subject: Re: [PATCH v3 5/8] dt-bindings: iio: adc: renesas,rzg2l-adc: Document RZ/G3L ADC for TSU
>>
>> On Tue, Sep 22, 2026 at 05:26:57AM +0100, Biju Das wrote:
>>> Add the renesas,r9a08g046-adc1 compatible string for the ADC1 instance
>>> on RZ/G3L, which is dedicated to the on-chip TSU (thermal
>>
>> Is there ADC2 instance?
>
> There is no ADC2 IP on RZ/G3L SoC.
Then I am a bit confused calling it ADC1 here and in the compatible.
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-09-28 6:27 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-22 4:26 [PATCH v3 0/8] Add Renesas RZ/G3L TSU support Biju Das
2026-09-22 4:26 ` [PATCH v3 1/8] clk: renesas: r9a08g046: Add TSU,ADC1 clocks and reset Biju Das
2026-09-23 10:09 ` Geert Uytterhoeven
2026-09-23 10:23 ` Biju Das
2026-09-22 4:26 ` [PATCH v3 2/8] dt-bindings: thermal: r9a08g045-tsu: Document RZ/G3L TSU Biju Das
2026-09-22 4:26 ` [PATCH v3 3/8] thermal/drivers/renesas/rzg3s: Convert calibration defaults to per-SoC match data Biju Das
2026-09-22 4:26 ` [PATCH v3 4/8] thermal/drivers/renesas/rzg3s: Add RZ/G3L TSU support Biju Das
2026-09-22 4:26 ` [PATCH v3 5/8] dt-bindings: iio: adc: renesas,rzg2l-adc: Document RZ/G3L ADC for TSU Biju Das
2026-09-28 6:05 ` Krzysztof Kozlowski
2026-09-28 6:25 ` Biju Das
2026-09-28 6:27 ` Krzysztof Kozlowski [this message]
2026-09-28 6:32 ` Biju Das
2026-09-28 7:53 ` Krzysztof Kozlowski
2026-09-22 4:26 ` [PATCH v3 6/8] iio: adc: rzg2l_adc: Rename num_channels to max_channels Biju Das
2026-09-22 14:33 ` Geert Uytterhoeven
2026-09-23 8:21 ` Biju Das
2026-09-25 2:55 ` Jonathan Cameron
2026-09-25 3:55 ` Biju Das
2026-09-27 18:06 ` Jonathan Cameron
2026-09-22 4:26 ` [PATCH v3 7/8] iio: adc: rzg2l_adc: Add RZ/G3L ADC support for TSU Biju Das
2026-09-22 4:41 ` sashiko-bot
2026-09-22 5:47 ` Biju Das
2026-09-22 4:27 ` [PATCH v3 8/8] arm64: dts: renesas: r9a08g046: Enable TSU Biju Das
2026-09-22 4:44 ` sashiko-bot
2026-09-22 5:07 ` Biju Das
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