From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D317EC7EE2E for ; Tue, 13 Jun 2023 01:37:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238286AbjFMBhm (ORCPT ); Mon, 12 Jun 2023 21:37:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57542 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230039AbjFMBhl (ORCPT ); Mon, 12 Jun 2023 21:37:41 -0400 Received: from mail-qk1-x72c.google.com (mail-qk1-x72c.google.com [IPv6:2607:f8b0:4864:20::72c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F589BA; Mon, 12 Jun 2023 18:37:38 -0700 (PDT) Received: by mail-qk1-x72c.google.com with SMTP id af79cd13be357-75d4094f9baso45378485a.1; Mon, 12 Jun 2023 18:37:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686620257; x=1689212257; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=xfXyedCW9caMGoIU8YcNXcNxtnnUDM81M0oJnaMPvj0=; b=AoikSY9Zs3LPomQayJ1LYcjv+iVFAmL2TQXHHSjphWe0aMz3ZRTZ98hrGzb/0CCPPB 90SSj69YCJQSiINQzeYQKwsWQ5PFqtLHB/wKS91lB8FMwYrvbNzFdOBwvjvsm/omvIR7 flLRJVuXXx1uam+KOL7uluDJYUIiUWc7NgsSl3F1yX5TqJn4Cx5ZktUIhbn6hLTx6A5O BuSDKleMh3/bWbxDp3IK5oXonoCAbSpEyf3sU4uBKZH8tqH00QkNwIpebmh1SGquLhIz 10XRXDSfOLLpVf3hAwC+VpoqlcHCRGociDHlRHLFrQHO9HPWM3CpmWZaApTDLCo+w6BL WEmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686620257; x=1689212257; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=xfXyedCW9caMGoIU8YcNXcNxtnnUDM81M0oJnaMPvj0=; b=j/XE05m/TdaaD5+xFBvagEXuSpqZNYlUrS7LTvqZ9CtwL3KEoZiOf7zppOobfcDljy 59auPdwTWWbviWtobiCkF4RvUL5YHz7aIxVAqd8M6I4oqyQu0oNwhW44Zn9Tvg0eQnyX +iRc2x0d0gRx5m27ujtLQkA312IeXfqsaY21VqR0wnHzqDaAlvWIhFlNB2gIldokYvdd BsmGx6fj3UNE2HWIchHB8Yid9YsC4+YRiws98FpXgLC4D9IKm3gzdCMCNXQtd2D7Bjdm w3ASi2tSO2hbgBQ6bgMJK8bCEoJdEhM/GomAgAPwNt0GHMYQc9sS3Y1WftlSzFqU2C0g uVyw== X-Gm-Message-State: AC+VfDx0iRK7NXUN0lz9X3LaghPh4eyRdWu82vQMfPgPlFhOwec8P49v HaLRcBov9cEZR4HbyeVK2+k= X-Google-Smtp-Source: ACHHUZ4etzmMEP/U5MLPlMDSE8KONRdJkCJslOZGUBHxO5iGKUghFFds2BL55wvksX9m4Gp7+Ygkdw== X-Received: by 2002:a05:620a:2483:b0:761:f5d2:16ec with SMTP id i3-20020a05620a248300b00761f5d216ecmr337241qkn.66.1686620257412; Mon, 12 Jun 2023 18:37:37 -0700 (PDT) Received: from [172.19.1.47] (60-250-192-107.hinet-ip.hinet.net. [60.250.192.107]) by smtp.gmail.com with ESMTPSA id v9-20020a17090a458900b0025bcdada95asm3440638pjg.38.2023.06.12.18.37.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 12 Jun 2023 18:37:36 -0700 (PDT) Message-ID: <233f4e83-e872-5499-2ca7-a1c277425fb0@gmail.com> Date: Tue, 13 Jun 2023 09:37:31 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH v13 08/10] clk: nuvoton: Add clock driver for ma35d1 clock controller Content-Language: en-US To: Stephen Boyd , catalin.marinas@arm.com, gregkh@linuxfoundation.org, jirislaby@kernel.org, krzysztof.kozlowski+dt@linaro.org, lee@kernel.org, mturquette@baylibre.com, p.zabel@pengutronix.de, robh+dt@kernel.org, tmaimon77@gmail.com, will@kernel.org Cc: devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org, arnd@arndb.de, soc@kernel.org, schung@nuvoton.com, mjchen@nuvoton.com, Jacky Huang , Krzysztof Kozlowski References: <20230605040749.67964-1-ychuang570808@gmail.com> <20230605040749.67964-9-ychuang570808@gmail.com> From: Jacky Huang In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Dear Stephen, On 2023/6/13 上午 09:02, Stephen Boyd wrote: > Quoting Jacky Huang (2023-06-04 21:07:47) >> diff --git a/drivers/clk/nuvoton/clk-ma35d1-divider.c b/drivers/clk/nuvoton/clk-ma35d1-divider.c >> new file mode 100644 >> index 000000000000..0c2bed47909a >> --- /dev/null >> +++ b/drivers/clk/nuvoton/clk-ma35d1-divider.c >> @@ -0,0 +1,135 @@ >> +// SPDX-License-Identifier: GPL-2.0-only >> +/* >> + * Copyright (C) 2023 Nuvoton Technology Corp. >> + * Author: Chi-Fang Li >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> + >> +struct ma35d1_adc_clk_div { >> + struct clk_hw hw; >> + void __iomem *reg; >> + u8 shift; >> + u8 width; >> + u32 mask; >> + const struct clk_div_table *table; >> + /* protects concurrent access to clock divider registers */ >> + spinlock_t *lock; >> +}; >> + >> +struct clk_hw *ma35d1_reg_adc_clkdiv(struct device *dev, const char *name, >> + struct clk_hw *parent_hw, spinlock_t *lock, >> + unsigned long flags, void __iomem *reg, >> + u8 shift, u8 width, u32 mask_bit); > Why is this forward declared? Yes, it's unused. I will remove this declaration. > >> + >> +static inline struct ma35d1_adc_clk_div *to_ma35d1_adc_clk_div(struct clk_hw *_hw) >> +{ >> + return container_of(_hw, struct ma35d1_adc_clk_div, hw); >> +} >> + >> +static unsigned long ma35d1_clkdiv_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) >> +{ >> + unsigned int val; >> + struct ma35d1_adc_clk_div *dclk = to_ma35d1_adc_clk_div(hw); >> + >> + val = readl_relaxed(dclk->reg) >> dclk->shift; >> + val &= clk_div_mask(dclk->width); >> + val += 1; >> + return divider_recalc_rate(hw, parent_rate, val, dclk->table, >> + CLK_DIVIDER_ROUND_CLOSEST, dclk->width); >> +} >> + >> +static long ma35d1_clkdiv_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) >> +{ >> + struct ma35d1_adc_clk_div *dclk = to_ma35d1_adc_clk_div(hw); >> + >> + return divider_round_rate(hw, rate, prate, dclk->table, >> + dclk->width, CLK_DIVIDER_ROUND_CLOSEST); >> +} >> + >> +static int ma35d1_clkdiv_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) >> +{ >> + int value; >> + unsigned long flags = 0; >> + u32 data; >> + struct ma35d1_adc_clk_div *dclk = to_ma35d1_adc_clk_div(hw); >> + >> + value = divider_get_val(rate, parent_rate, dclk->table, >> + dclk->width, CLK_DIVIDER_ROUND_CLOSEST); >> + >> + spin_lock_irqsave(dclk->lock, flags); >> + >> + data = readl_relaxed(dclk->reg); >> + data &= ~(clk_div_mask(dclk->width) << dclk->shift); >> + data |= (value - 1) << dclk->shift; >> + data |= dclk->mask; >> + writel_relaxed(data, dclk->reg); >> + >> + spin_unlock_irqrestore(dclk->lock, flags); >> + return 0; >> +} >> + >> +static const struct clk_ops ma35d1_adc_clkdiv_ops = { >> + .recalc_rate = ma35d1_clkdiv_recalc_rate, >> + .round_rate = ma35d1_clkdiv_round_rate, >> + .set_rate = ma35d1_clkdiv_set_rate, >> +}; >> + >> +struct clk_hw *ma35d1_reg_adc_clkdiv(struct device *dev, const char *name, >> + struct clk_hw *parent_hw, spinlock_t *lock, >> + unsigned long flags, void __iomem *reg, >> + u8 shift, u8 width, u32 mask_bit) >> +{ >> + struct ma35d1_adc_clk_div *div; >> + struct clk_init_data init; >> + struct clk_div_table *table; >> + struct clk_parent_data pdata = { .index = 0 }; >> + u32 max_div, min_div; >> + struct clk_hw *hw; >> + int ret; >> + int i; >> + >> + div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); >> + if (!div) >> + return ERR_PTR(-ENOMEM); >> + >> + max_div = clk_div_mask(width) + 1; >> + min_div = 1; >> + >> + table = devm_kcalloc(dev, max_div + 1, sizeof(*table), GFP_KERNEL); >> + if (!table) >> + return ERR_PTR(-ENOMEM); >> + >> + for (i = 0; i < max_div; i++) { >> + table[i].val = min_div + i; >> + table[i].div = 2 * table[i].val; >> + } >> + table[max_div].val = 0; >> + table[max_div].div = 0; >> + >> + memset(&init, 0, sizeof(init)); >> + init.name = name; >> + init.ops = &ma35d1_adc_clkdiv_ops; >> + init.flags |= flags; >> + pdata.hw = parent_hw; >> + init.parent_data = &pdata; >> + init.num_parents = 1; >> + >> + div->reg = reg; >> + div->shift = shift; >> + div->width = width; >> + div->mask = mask_bit ? BIT(mask_bit) : 0; >> + div->lock = lock; >> + div->hw.init = &init; >> + div->table = table; >> + >> + hw = &div->hw; >> + ret = devm_clk_hw_register(dev, hw); >> + if (ret) >> + return ERR_PTR(ret); >> + return hw; >> +} >> +EXPORT_SYMBOL_GPL(ma35d1_reg_adc_clkdiv); >> diff --git a/drivers/clk/nuvoton/clk-ma35d1-pll.c b/drivers/clk/nuvoton/clk-ma35d1-pll.c >> new file mode 100644 >> index 000000000000..e4c9f94e6796 >> --- /dev/null >> +++ b/drivers/clk/nuvoton/clk-ma35d1-pll.c >> @@ -0,0 +1,361 @@ >> +// SPDX-License-Identifier: GPL-2.0-only >> +/* >> + * Copyright (C) 2023 Nuvoton Technology Corp. >> + * Author: Chi-Fang Li >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +/* PLL frequency limits */ >> +#define PLL_FREF_MAX_FREQ (200 * HZ_PER_MHZ) >> +#define PLL_FREF_MIN_FREQ (1 * HZ_PER_MHZ) >> +#define PLL_FREF_M_MAX_FREQ (40 * HZ_PER_MHZ) >> +#define PLL_FREF_M_MIN_FREQ (10 * HZ_PER_MHZ) >> +#define PLL_FCLK_MAX_FREQ (2400 * HZ_PER_MHZ) >> +#define PLL_FCLK_MIN_FREQ (600 * HZ_PER_MHZ) >> +#define PLL_FCLKO_MAX_FREQ (2400 * HZ_PER_MHZ) >> +#define PLL_FCLKO_MIN_FREQ (85700 * HZ_PER_KHZ) >> +#define PLL_SS_RATE 0x77 >> +#define PLL_SLOPE 0x58CFA >> + >> +#define REG_PLL_CTL0_OFFSET 0x0 >> +#define REG_PLL_CTL1_OFFSET 0x4 >> +#define REG_PLL_CTL2_OFFSET 0x8 >> + >> +/* bit fields for REG_CLK_PLL0CTL0, which is SMIC PLL design */ >> +#define SPLL0_CTL0_FBDIV GENMASK(7, 0) >> +#define SPLL0_CTL0_INDIV GENMASK(11, 8) >> +#define SPLL0_CTL0_OUTDIV GENMASK(13, 12) >> +#define SPLL0_CTL0_PD BIT(16) >> +#define SPLL0_CTL0_BP BIT(17) >> + >> +/* bit fields for REG_CLK_PLLxCTL0 ~ REG_CLK_PLLxCTL2, where x = 2 ~ 5 */ >> +#define PLL_CTL0_FBDIV GENMASK(10, 0) >> +#define PLL_CTL0_INDIV GENMASK(17, 12) >> +#define PLL_CTL0_MODE GENMASK(19, 18) >> +#define PLL_CTL0_SSRATE GENMASK(30, 20) >> +#define PLL_CTL1_PD BIT(0) >> +#define PLL_CTL1_BP BIT(1) >> +#define PLL_CTL1_OUTDIV GENMASK(6, 4) >> +#define PLL_CTL1_FRAC GENMASK(31, 24) >> +#define PLL_CTL2_SLOPE GENMASK(23, 0) >> + >> +#define INDIV_MIN 1 >> +#define INDIV_MAX 63 >> +#define FBDIV_MIN 16 >> +#define FBDIV_MAX 2047 >> +#define FBDIV_FRAC_MIN 1600 >> +#define FBDIV_FRAC_MAX 204700 >> +#define OUTDIV_MIN 1 >> +#define OUTDIV_MAX 7 >> + >> +#define PLL_MODE_INT 0 >> +#define PLL_MODE_FRAC 1 >> +#define PLL_MODE_SS 2 >> + >> +struct ma35d1_clk_pll { >> + struct clk_hw hw; >> + u32 id; >> + u8 mode; >> + void __iomem *ctl0_base; >> + void __iomem *ctl1_base; >> + void __iomem *ctl2_base; >> +}; >> + >> +struct clk_hw *ma35d1_reg_clk_pll(struct device *dev, u32 id, u8 u8mode, const char *name, >> + struct clk_hw *parent_hw, void __iomem *base); > Why is this forward declared? I will remove it. > >> + >> +static inline struct ma35d1_clk_pll *to_ma35d1_clk_pll(struct clk_hw *_hw) >> +{ >> + return container_of(_hw, struct ma35d1_clk_pll, hw); >> +} >> + >> +static unsigned long ma35d1_calc_smic_pll_freq(u32 pll0_ctl0, >> + unsigned long parent_rate) >> +{ >> + u32 m, n, p, outdiv; >> + u64 pll_freq; >> + >> + if (pll0_ctl0 & SPLL0_CTL0_BP) >> + return parent_rate; >> + >> + n = FIELD_GET(SPLL0_CTL0_FBDIV, pll0_ctl0); >> + m = FIELD_GET(SPLL0_CTL0_INDIV, pll0_ctl0); >> + p = FIELD_GET(SPLL0_CTL0_OUTDIV, pll0_ctl0); >> + outdiv = 1 << p; >> + pll_freq = (u64)parent_rate * n; >> + div_u64(pll_freq, m * outdiv); >> + return pll_freq; >> +} >> + >> +static unsigned long ma35d1_calc_pll_freq(u8 mode, u32 *reg_ctl, unsigned long parent_rate) >> +{ >> + unsigned long pll_freq, x; >> + u32 m, n, p; >> + >> + if (reg_ctl[1] & PLL_CTL1_BP) >> + return parent_rate; >> + >> + n = FIELD_GET(PLL_CTL0_FBDIV, reg_ctl[0]); >> + m = FIELD_GET(PLL_CTL0_INDIV, reg_ctl[0]); >> + p = FIELD_GET(PLL_CTL1_OUTDIV, reg_ctl[1]); >> + >> + if (mode == PLL_MODE_INT) { >> + pll_freq = (u64)parent_rate * n; >> + div_u64(pll_freq, m * p); >> + } else { >> + x = FIELD_GET(PLL_CTL1_FRAC, reg_ctl[1]); >> + /* 2 decimal places floating to integer (ex. 1.23 to 123) */ >> + n = n * 100 + ((x * 100) / FIELD_MAX(PLL_CTL1_FRAC)); >> + pll_freq = div_u64(parent_rate * n, 100 * m * p); >> + } >> + return pll_freq; >> +} >> + >> +static int ma35d1_pll_find_closest(struct ma35d1_clk_pll *pll, unsigned long rate, >> + unsigned long parent_rate, u32 *reg_ctl, >> + unsigned long *freq) >> +{ >> + unsigned long min_diff = ULONG_MAX; >> + int fbdiv_min, fbdiv_max; >> + int p, m, n; >> + >> + *freq = 0; >> + if (rate < PLL_FCLKO_MIN_FREQ || rate > PLL_FCLKO_MAX_FREQ) >> + return -EINVAL; >> + >> + if (pll->mode == PLL_MODE_INT) { >> + fbdiv_min = FBDIV_MIN; >> + fbdiv_max = FBDIV_MAX; >> + } else { >> + fbdiv_min = FBDIV_FRAC_MIN; >> + fbdiv_max = FBDIV_FRAC_MAX; >> + } >> + >> + for (m = INDIV_MIN; m <= INDIV_MAX; m++) { >> + for (n = fbdiv_min; n <= fbdiv_max; n++) { >> + for (p = OUTDIV_MIN; p <= OUTDIV_MAX; p++) { >> + unsigned long tmp, fout, fclk, diff; >> + >> + tmp = div_u64(parent_rate, m); >> + if (tmp < PLL_FREF_M_MIN_FREQ || >> + tmp > PLL_FREF_M_MAX_FREQ) >> + continue; /* constrain */ >> + >> + fclk = div_u64(parent_rate * n, m); >> + /* for 2 decimal places */ >> + if (pll->mode != PLL_MODE_INT) >> + fclk = div_u64(fclk, 100); >> + >> + if (fclk < PLL_FCLK_MIN_FREQ || >> + fclk > PLL_FCLK_MAX_FREQ) >> + continue; /* constrain */ >> + >> + fout = div_u64(fclk, p); >> + if (fout < PLL_FCLKO_MIN_FREQ || >> + fout > PLL_FCLKO_MAX_FREQ) >> + continue; /* constrain */ >> + >> + diff = abs(rate - fout); >> + if (diff < min_diff) { >> + reg_ctl[0] = FIELD_PREP(PLL_CTL0_INDIV, m) | >> + FIELD_PREP(PLL_CTL0_FBDIV, n); >> + reg_ctl[1] = FIELD_PREP(PLL_CTL1_OUTDIV, p); >> + *freq = fout; >> + min_diff = diff; >> + if (min_diff == 0) >> + break; >> + } >> + } >> + } >> + } >> + if (*freq == 0) >> + return -EINVAL; /* cannot find even one valid setting */ >> + return 0; >> +} >> + >> +static int ma35d1_clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, >> + unsigned long parent_rate) >> +{ >> + struct ma35d1_clk_pll *pll = to_ma35d1_clk_pll(hw); >> + u32 reg_ctl[3] = { 0 }; >> + unsigned long pll_freq; >> + int ret; >> + >> + if (parent_rate < PLL_FREF_MIN_FREQ || parent_rate > PLL_FREF_MAX_FREQ) >> + return -EINVAL; >> + >> + ret = ma35d1_pll_find_closest(pll, rate, parent_rate, reg_ctl, &pll_freq); >> + if (ret != 0) >> + return ret; >> + >> + switch (pll->mode) { >> + case PLL_MODE_INT: >> + reg_ctl[0] |= FIELD_PREP(PLL_CTL0_MODE, PLL_MODE_INT); >> + break; >> + case PLL_MODE_FRAC: >> + reg_ctl[0] |= FIELD_PREP(PLL_CTL0_MODE, PLL_MODE_FRAC); >> + break; >> + case PLL_MODE_SS: >> + reg_ctl[0] |= FIELD_PREP(PLL_CTL0_MODE, PLL_MODE_SS) | >> + FIELD_PREP(PLL_CTL0_SSRATE, PLL_SS_RATE); >> + reg_ctl[2] = FIELD_PREP(PLL_CTL2_SLOPE, PLL_SLOPE); >> + break; >> + } >> + reg_ctl[1] |= PLL_CTL1_PD; >> + >> + writel_relaxed(reg_ctl[0], pll->ctl0_base); >> + writel_relaxed(reg_ctl[1], pll->ctl1_base); >> + writel_relaxed(reg_ctl[2], pll->ctl2_base); >> + return 0; >> +} >> + >> +static unsigned long ma35d1_clk_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) >> +{ >> + struct ma35d1_clk_pll *pll = to_ma35d1_clk_pll(hw); >> + u32 reg_ctl[3]; >> + unsigned long pll_freq; >> + >> + if (parent_rate < PLL_FREF_MIN_FREQ || parent_rate > PLL_FREF_MAX_FREQ) >> + return 0; >> + >> + switch (pll->id) { >> + case CAPLL: >> + reg_ctl[0] = readl_relaxed(pll->ctl0_base); >> + pll_freq = ma35d1_calc_smic_pll_freq(reg_ctl[0], parent_rate); >> + return pll_freq; >> + case DDRPLL: >> + case APLL: >> + case EPLL: >> + case VPLL: >> + reg_ctl[0] = readl_relaxed(pll->ctl0_base); >> + reg_ctl[1] = readl_relaxed(pll->ctl1_base); >> + pll_freq = ma35d1_calc_pll_freq(pll->mode, reg_ctl, parent_rate); >> + return pll_freq; >> + } >> + return 0; >> +} >> + >> +static long ma35d1_clk_pll_round_rate(struct clk_hw *hw, unsigned long rate, >> + unsigned long *parent_rate) >> +{ >> + struct ma35d1_clk_pll *pll = to_ma35d1_clk_pll(hw); >> + u32 reg_ctl[3] = { 0 }; >> + unsigned long pll_freq; >> + long ret; >> + >> + if (*parent_rate < PLL_FREF_MIN_FREQ || *parent_rate > PLL_FREF_MAX_FREQ) >> + return -EINVAL; >> + >> + ret = ma35d1_pll_find_closest(pll, rate, *parent_rate, reg_ctl, &pll_freq); >> + if (ret < 0) >> + return ret; >> + >> + switch (pll->id) { >> + case CAPLL: >> + reg_ctl[0] = readl_relaxed(pll->ctl0_base); >> + pll_freq = ma35d1_calc_smic_pll_freq(reg_ctl[0], *parent_rate); >> + return pll_freq; >> + case DDRPLL: >> + case APLL: >> + case EPLL: >> + case VPLL: >> + reg_ctl[0] = readl_relaxed(pll->ctl0_base); >> + reg_ctl[1] = readl_relaxed(pll->ctl1_base); >> + pll_freq = ma35d1_calc_pll_freq(pll->mode, reg_ctl, *parent_rate); >> + return pll_freq; >> + } >> + return 0; >> +} >> + >> +static int ma35d1_clk_pll_is_prepared(struct clk_hw *hw) >> +{ >> + struct ma35d1_clk_pll *pll = to_ma35d1_clk_pll(hw); >> + u32 val = readl_relaxed(pll->ctl1_base); >> + >> + return !(val & PLL_CTL1_PD); >> +} >> + >> +static int ma35d1_clk_pll_prepare(struct clk_hw *hw) >> +{ >> + struct ma35d1_clk_pll *pll = to_ma35d1_clk_pll(hw); >> + u32 val; >> + >> + val = readl_relaxed(pll->ctl1_base); >> + val &= ~PLL_CTL1_PD; >> + writel_relaxed(val, pll->ctl1_base); >> + return 0; >> +} >> + >> +static void ma35d1_clk_pll_unprepare(struct clk_hw *hw) >> +{ >> + struct ma35d1_clk_pll *pll = to_ma35d1_clk_pll(hw); >> + u32 val; >> + >> + val = readl_relaxed(pll->ctl1_base); >> + val |= PLL_CTL1_PD; >> + writel_relaxed(val, pll->ctl1_base); >> +} >> + >> +static const struct clk_ops ma35d1_clk_pll_ops = { >> + .is_prepared = ma35d1_clk_pll_is_prepared, >> + .prepare = ma35d1_clk_pll_prepare, >> + .unprepare = ma35d1_clk_pll_unprepare, >> + .set_rate = ma35d1_clk_pll_set_rate, >> + .recalc_rate = ma35d1_clk_pll_recalc_rate, >> + .round_rate = ma35d1_clk_pll_round_rate, >> +}; >> + >> +static const struct clk_ops ma35d1_clk_fixed_pll_ops = { >> + .recalc_rate = ma35d1_clk_pll_recalc_rate, >> + .round_rate = ma35d1_clk_pll_round_rate, >> +}; >> + >> +struct clk_hw *ma35d1_reg_clk_pll(struct device *dev, u32 id, u8 u8mode, const char *name, >> + struct clk_hw *parent_hw, void __iomem *base) >> +{ >> + struct clk_parent_data pdata = { .index = 0 }; >> + struct clk_init_data init = {}; >> + struct ma35d1_clk_pll *pll; >> + struct clk_hw *hw; >> + int ret; >> + >> + pll = devm_kzalloc(dev, sizeof(*pll), GFP_KERNEL); >> + if (!pll) >> + return ERR_PTR(-ENOMEM); >> + >> + pll->id = id; >> + pll->mode = u8mode; >> + pll->ctl0_base = base + REG_PLL_CTL0_OFFSET; >> + pll->ctl1_base = base + REG_PLL_CTL1_OFFSET; >> + pll->ctl2_base = base + REG_PLL_CTL2_OFFSET; >> + >> + init.name = name; >> + init.flags = 0; >> + pdata.hw = parent_hw; >> + init.parent_data = &pdata; >> + init.num_parents = 1; >> + >> + if (id == CAPLL || id == DDRPLL) >> + init.ops = &ma35d1_clk_fixed_pll_ops; >> + else >> + init.ops = &ma35d1_clk_pll_ops; >> + >> + pll->hw.init = &init; >> + hw = &pll->hw; >> + >> + ret = devm_clk_hw_register(dev, hw); >> + if (ret) >> + return ERR_PTR(ret); >> + return hw; >> +} >> +EXPORT_SYMBOL_GPL(ma35d1_reg_clk_pll); >> diff --git a/drivers/clk/nuvoton/clk-ma35d1.c b/drivers/clk/nuvoton/clk-ma35d1.c >> new file mode 100644 >> index 000000000000..297b11585f00 >> --- /dev/null >> +++ b/drivers/clk/nuvoton/clk-ma35d1.c >> @@ -0,0 +1,933 @@ >> +// SPDX-License-Identifier: GPL-2.0-only >> +/* >> + * Copyright (C) 2023 Nuvoton Technology Corp. >> + * Author: Chi-Fang Li >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +static DEFINE_SPINLOCK(ma35d1_lock); >> + >> +#define PLL_MAX_NUM 5 >> + >> +/* Clock Control Registers Offset */ >> +#define REG_CLK_PWRCTL 0x00 >> +#define REG_CLK_SYSCLK0 0x04 >> +#define REG_CLK_SYSCLK1 0x08 >> +#define REG_CLK_APBCLK0 0x0C >> +#define REG_CLK_APBCLK1 0x10 >> +#define REG_CLK_APBCLK2 0x14 >> +#define REG_CLK_CLKSEL0 0x18 >> +#define REG_CLK_CLKSEL1 0x1C >> +#define REG_CLK_CLKSEL2 0x20 >> +#define REG_CLK_CLKSEL3 0x24 >> +#define REG_CLK_CLKSEL4 0x28 >> +#define REG_CLK_CLKDIV0 0x2C >> +#define REG_CLK_CLKDIV1 0x30 >> +#define REG_CLK_CLKDIV2 0x34 >> +#define REG_CLK_CLKDIV3 0x38 >> +#define REG_CLK_CLKDIV4 0x3C >> +#define REG_CLK_CLKOCTL 0x40 >> +#define REG_CLK_STATUS 0x50 >> +#define REG_CLK_PLL0CTL0 0x60 >> +#define REG_CLK_PLL2CTL0 0x80 >> +#define REG_CLK_PLL2CTL1 0x84 >> +#define REG_CLK_PLL2CTL2 0x88 >> +#define REG_CLK_PLL3CTL0 0x90 >> +#define REG_CLK_PLL3CTL1 0x94 >> +#define REG_CLK_PLL3CTL2 0x98 >> +#define REG_CLK_PLL4CTL0 0xA0 >> +#define REG_CLK_PLL4CTL1 0xA4 >> +#define REG_CLK_PLL4CTL2 0xA8 >> +#define REG_CLK_PLL5CTL0 0xB0 >> +#define REG_CLK_PLL5CTL1 0xB4 >> +#define REG_CLK_PLL5CTL2 0xB8 >> +#define REG_CLK_CLKDCTL 0xC0 >> +#define REG_CLK_CLKDSTS 0xC4 >> +#define REG_CLK_CDUPB 0xC8 >> +#define REG_CLK_CDLOWB 0xCC >> +#define REG_CLK_CKFLTRCTL 0xD0 >> +#define REG_CLK_TESTCLK 0xF0 >> +#define REG_CLK_PLLCTL 0x40 > Please use lowercase hex. I will fix them. >> + >> +#define PLL_MODE_INT 0 >> +#define PLL_MODE_FRAC 1 >> +#define PLL_MODE_SS 2 >> + >> +struct clk_hw *ma35d1_reg_clk_pll(struct device *dev, u32 id, u8 u8mode, >> + const char *name, struct clk_hw *parent_hw, >> + void __iomem *base); >> +struct clk_hw *ma35d1_reg_adc_clkdiv(struct device *dev, const char *name, >> + struct clk_hw *hw, spinlock_t *lock, >> + unsigned long flags, void __iomem *reg, >> + u8 shift, u8 width, u32 mask_bit); > These function prototypes should be in a header and included in any C > files that use them. I will re-create clk-ma35d1.h in the same directory, and move these function prototypes to the header file. >> + >> +static const struct clk_parent_data ca35clk_sel_clks[] = { >> + { .index = 0 }, /* HXT */ >> + { .index = 1 }, /* CAPLL */ >> + { .index = 2 } /* DDRPLL */ >> +}; >> + >> +static const char *const sysclk0_sel_clks[] = { >> + "epll_div2", "syspll" >> +}; >> + >> +static const char *const sysclk1_sel_clks[] = { >> + "hxt", "syspll" > [...] >> + "pclk0", "apll", "dummy", "dummy" >> +}; >> + >> +static const char *const i2s0_sel_clks[] = { >> + "apll", "sysclk1_div2", "dummy", "dummy" >> +}; >> + >> +static const char *const i2s1_sel_clks[] = { >> + "apll", "sysclk1_div2", "dummy", "dummy" >> +}; >> + >> +static const char *const can_sel_clks[] = { >> + "apll", "vpll" >> +}; >> + >> +static const char *const cko_sel_clks[] = { >> + "hxt", "lxt", "hirc", "lirc", "capll_div4", "syspll", >> + "ddrpll", "epll_div2", "apll", "vpll", "dummy", "dummy", >> + "dummy", "dummy", "dummy", "dummy" > I suspect "dummy" is something that we don't want to tell Linux about? > If possible, we should simply omit it entirely from the parent_data > arrays. The array is a mapping to bit field of clock selection registers, and "dummy" means reserved. I will remove the trailing "dummy", but would like to preserve the middle "dummy" as the followings. static const char *const timer0_sel_clks[] = {     "hxt", "lxt", "pclk0", "dummy", "dummy", "lirc", "dummy", "hirc" }; >> +}; >> + >> +static const char *const smc_sel_clks[] = { >> + "hxt", "pclk4" >> +}; >> + >> +static const char *const kpi_sel_clks[] = { >> + "hxt", "lxt" >> +}; >> + >> +static const struct clk_div_table ip_div_table[] = { >> + {0, 2}, {1, 4}, {2, 6}, {3, 8}, {4, 10}, >> + {5, 12}, {6, 14}, {7, 16}, {0, 0}, >> +}; >> + >> +static const struct clk_div_table eadc_div_table[] = { >> + {0, 2}, {1, 4}, {2, 6}, {3, 8}, {4, 10}, >> + {5, 12}, {6, 14}, {7, 16}, {8, 18}, >> + {9, 20}, {10, 22}, {11, 24}, {12, 26}, >> + {13, 28}, {14, 30}, {15, 32}, {0, 0}, >> +}; >> + >> +static struct clk_hw *ma35d1_clk_fixed(const char *name, int rate) >> +{ >> + return clk_hw_register_fixed_rate(NULL, name, NULL, 0, rate); >> +} >> + >> +static struct clk_hw *ma35d1_clk_mux_parent(struct device *dev, const char *name, >> + void __iomem *reg, u8 shift, u8 width, >> + const struct clk_parent_data *pdata, >> + int num_pdata) >> +{ >> + return clk_hw_register_mux_parent_data(dev, name, pdata, num_pdata, >> + CLK_SET_RATE_NO_REPARENT, reg, shift, >> + width, 0, &ma35d1_lock); >> +} >> + >> +static struct clk_hw *ma35d1_clk_mux(struct device *dev, const char *name, >> + void __iomem *reg, u8 shift, u8 width, >> + const char *const *parents, int num_parents) > Please don't use string arrays for parent descriptions. Everything > should use clk_parent_data or direct clk_hw pointers. I will use clk_parent_data instead of strings. Best Regards, Jacky Huang From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 17D62C7EE43 for ; Tue, 13 Jun 2023 01:38:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=375Mph6mwhg8M4jUGNvEFUu8ia1AFDcFq35HtdNM+Yw=; b=S5WXbThQPz7J+6 7lbS3Xv8fl4+oD2p0wE2Lr8PVgy3oIyHjyQGUjIfc4U/GD0cMLpAi9BGs/baAh7TFvwiFoW4StH+T zm8hknSXyg3OjySg+La3yI/eXgpJ33cr6lj9/JR14XU97b/MYvOhD3yCci5zefNFdXniviEkmELBI H/jNzXc2/EmMFOdu/G6tuAB/Co92UGu91wskS272ySvNN1drsX5cwcNpqnyQhQhmNT4RHjWbEosYc UJ8ljMrhNRw3o755ZfyM2YA+h8g1r5UTUGpf9TRQm0x0F2U/qagdBVDT2ZtzYu+diRmdQfIJkaSog y5Ww4CBcZU12/ukP4fdw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q8syc-006anj-2s; Tue, 13 Jun 2023 01:37:42 +0000 Received: from mail-qk1-x730.google.com ([2607:f8b0:4864:20::730]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q8syZ-006amp-0D for linux-arm-kernel@lists.infradead.org; Tue, 13 Jun 2023 01:37:41 +0000 Received: by mail-qk1-x730.google.com with SMTP id af79cd13be357-75d44cb20a2so44474485a.3 for ; Mon, 12 Jun 2023 18:37:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686620257; x=1689212257; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=xfXyedCW9caMGoIU8YcNXcNxtnnUDM81M0oJnaMPvj0=; b=AoikSY9Zs3LPomQayJ1LYcjv+iVFAmL2TQXHHSjphWe0aMz3ZRTZ98hrGzb/0CCPPB 90SSj69YCJQSiINQzeYQKwsWQ5PFqtLHB/wKS91lB8FMwYrvbNzFdOBwvjvsm/omvIR7 flLRJVuXXx1uam+KOL7uluDJYUIiUWc7NgsSl3F1yX5TqJn4Cx5ZktUIhbn6hLTx6A5O BuSDKleMh3/bWbxDp3IK5oXonoCAbSpEyf3sU4uBKZH8tqH00QkNwIpebmh1SGquLhIz 10XRXDSfOLLpVf3hAwC+VpoqlcHCRGociDHlRHLFrQHO9HPWM3CpmWZaApTDLCo+w6BL WEmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686620257; x=1689212257; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=xfXyedCW9caMGoIU8YcNXcNxtnnUDM81M0oJnaMPvj0=; b=bB5lVAycv90wbBCYUJha5tGLabQ72b0lBmPPwepJzElAFDibobWF37Z+cB+i1XFm47 Rrw8DX+Zdl66b4wctM6TTsAfoWmzZZenwXQPn9rPTdCBWgKNmoCTBX5vApnJGanawVdB 71ZK8R32+2hWm2RpxV38eFit/8X4D3fOU461iVb5VS7XBp/N9+Dx8ZBjNgPWYofwPqw/ jaVUBAShNC5a2h8baMp27k/6vNxGGNhpC6ega/eoF6M/CmGaeWE6t4CgdIdr/3TGW7Tz uovbxWnrzy5FIK5FkfvCqVSB3uDDsgc4D1iK2tLWFK3f06pJgi+T5/MpAZU8DM0QkQws GazQ== X-Gm-Message-State: AC+VfDwqmY76PYp8aOMBnCk7CnJrRIP7/YU8NoMSSv1Uc1KgXrtZ/6l4 TWCfsUSx3lz9AzdeOSm95Tm7MW51lGE= X-Google-Smtp-Source: ACHHUZ4etzmMEP/U5MLPlMDSE8KONRdJkCJslOZGUBHxO5iGKUghFFds2BL55wvksX9m4Gp7+Ygkdw== X-Received: by 2002:a05:620a:2483:b0:761:f5d2:16ec with SMTP id i3-20020a05620a248300b00761f5d216ecmr337241qkn.66.1686620257412; Mon, 12 Jun 2023 18:37:37 -0700 (PDT) Received: from [172.19.1.47] (60-250-192-107.hinet-ip.hinet.net. [60.250.192.107]) by smtp.gmail.com with ESMTPSA id v9-20020a17090a458900b0025bcdada95asm3440638pjg.38.2023.06.12.18.37.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 12 Jun 2023 18:37:36 -0700 (PDT) Message-ID: <233f4e83-e872-5499-2ca7-a1c277425fb0@gmail.com> Date: Tue, 13 Jun 2023 09:37:31 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH v13 08/10] clk: nuvoton: Add clock driver for ma35d1 clock controller Content-Language: en-US To: Stephen Boyd , catalin.marinas@arm.com, gregkh@linuxfoundation.org, jirislaby@kernel.org, krzysztof.kozlowski+dt@linaro.org, lee@kernel.org, mturquette@baylibre.com, p.zabel@pengutronix.de, robh+dt@kernel.org, tmaimon77@gmail.com, will@kernel.org Cc: devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org, arnd@arndb.de, soc@kernel.org, schung@nuvoton.com, mjchen@nuvoton.com, Jacky Huang , Krzysztof Kozlowski References: <20230605040749.67964-1-ychuang570808@gmail.com> <20230605040749.67964-9-ychuang570808@gmail.com> From: Jacky Huang In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230612_183739_110668_C81C50F5 X-CRM114-Status: GOOD ( 18.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org RGVhciBTdGVwaGVuLAoKCk9uIDIwMjMvNi8xMyDkuIrljYggMDk6MDIsIFN0ZXBoZW4gQm95ZCB3 cm90ZToKPiBRdW90aW5nIEphY2t5IEh1YW5nICgyMDIzLTA2LTA0IDIxOjA3OjQ3KQo+PiBkaWZm IC0tZ2l0IGEvZHJpdmVycy9jbGsvbnV2b3Rvbi9jbGstbWEzNWQxLWRpdmlkZXIuYyBiL2RyaXZl cnMvY2xrL251dm90b24vY2xrLW1hMzVkMS1kaXZpZGVyLmMKPj4gbmV3IGZpbGUgbW9kZSAxMDA2 NDQKPj4gaW5kZXggMDAwMDAwMDAwMDAwLi4wYzJiZWQ0NzkwOWEKPj4gLS0tIC9kZXYvbnVsbAo+ PiArKysgYi9kcml2ZXJzL2Nsay9udXZvdG9uL2Nsay1tYTM1ZDEtZGl2aWRlci5jCj4+IEBAIC0w LDAgKzEsMTM1IEBACj4+ICsvLyBTUERYLUxpY2Vuc2UtSWRlbnRpZmllcjogR1BMLTIuMC1vbmx5 Cj4+ICsvKgo+PiArICogQ29weXJpZ2h0IChDKSAyMDIzIE51dm90b24gVGVjaG5vbG9neSBDb3Jw Lgo+PiArICogQXV0aG9yOiBDaGktRmFuZyBMaSA8Y2ZsaTBAbnV2b3Rvbi5jb20+Cj4+ICsgKi8K Pj4gKwo+PiArI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgo+PiArI2luY2x1ZGUgPGxp bnV4L2RldmljZS5oPgo+PiArI2luY2x1ZGUgPGxpbnV4L3JlZ21hcC5oPgo+PiArI2luY2x1ZGUg PGxpbnV4L3NwaW5sb2NrLmg+Cj4+ICsKPj4gK3N0cnVjdCBtYTM1ZDFfYWRjX2Nsa19kaXYgewo+ PiArICAgICAgIHN0cnVjdCBjbGtfaHcgaHc7Cj4+ICsgICAgICAgdm9pZCBfX2lvbWVtICpyZWc7 Cj4+ICsgICAgICAgdTggc2hpZnQ7Cj4+ICsgICAgICAgdTggd2lkdGg7Cj4+ICsgICAgICAgdTMy IG1hc2s7Cj4+ICsgICAgICAgY29uc3Qgc3RydWN0IGNsa19kaXZfdGFibGUgKnRhYmxlOwo+PiAr ICAgICAgIC8qIHByb3RlY3RzIGNvbmN1cnJlbnQgYWNjZXNzIHRvIGNsb2NrIGRpdmlkZXIgcmVn aXN0ZXJzICovCj4+ICsgICAgICAgc3BpbmxvY2tfdCAqbG9jazsKPj4gK307Cj4+ICsKPj4gK3N0 cnVjdCBjbGtfaHcgKm1hMzVkMV9yZWdfYWRjX2Nsa2RpdihzdHJ1Y3QgZGV2aWNlICpkZXYsIGNv bnN0IGNoYXIgKm5hbWUsCj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBz dHJ1Y3QgY2xrX2h3ICpwYXJlbnRfaHcsIHNwaW5sb2NrX3QgKmxvY2ssCj4+ICsgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICB1bnNpZ25lZCBsb25nIGZsYWdzLCB2b2lkIF9faW9t ZW0gKnJlZywKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIHU4IHNoaWZ0 LCB1OCB3aWR0aCwgdTMyIG1hc2tfYml0KTsKPiBXaHkgaXMgdGhpcyBmb3J3YXJkIGRlY2xhcmVk PwoKWWVzLCBpdCdzIHVudXNlZC4gSSB3aWxsIHJlbW92ZSB0aGlzIGRlY2xhcmF0aW9uLgoKPgo+ PiArCj4+ICtzdGF0aWMgaW5saW5lIHN0cnVjdCBtYTM1ZDFfYWRjX2Nsa19kaXYgKnRvX21hMzVk MV9hZGNfY2xrX2RpdihzdHJ1Y3QgY2xrX2h3ICpfaHcpCj4+ICt7Cj4+ICsgICAgICAgcmV0dXJu IGNvbnRhaW5lcl9vZihfaHcsIHN0cnVjdCBtYTM1ZDFfYWRjX2Nsa19kaXYsIGh3KTsKPj4gK30K Pj4gKwo+PiArc3RhdGljIHVuc2lnbmVkIGxvbmcgbWEzNWQxX2Nsa2Rpdl9yZWNhbGNfcmF0ZShz dHJ1Y3QgY2xrX2h3ICpodywgdW5zaWduZWQgbG9uZyBwYXJlbnRfcmF0ZSkKPj4gK3sKPj4gKyAg ICAgICB1bnNpZ25lZCBpbnQgdmFsOwo+PiArICAgICAgIHN0cnVjdCBtYTM1ZDFfYWRjX2Nsa19k aXYgKmRjbGsgPSB0b19tYTM1ZDFfYWRjX2Nsa19kaXYoaHcpOwo+PiArCj4+ICsgICAgICAgdmFs ID0gcmVhZGxfcmVsYXhlZChkY2xrLT5yZWcpID4+IGRjbGstPnNoaWZ0Owo+PiArICAgICAgIHZh bCAmPSBjbGtfZGl2X21hc2soZGNsay0+d2lkdGgpOwo+PiArICAgICAgIHZhbCArPSAxOwo+PiAr ICAgICAgIHJldHVybiBkaXZpZGVyX3JlY2FsY19yYXRlKGh3LCBwYXJlbnRfcmF0ZSwgdmFsLCBk Y2xrLT50YWJsZSwKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBDTEtfRElW SURFUl9ST1VORF9DTE9TRVNULCBkY2xrLT53aWR0aCk7Cj4+ICt9Cj4+ICsKPj4gK3N0YXRpYyBs b25nIG1hMzVkMV9jbGtkaXZfcm91bmRfcmF0ZShzdHJ1Y3QgY2xrX2h3ICpodywgdW5zaWduZWQg bG9uZyByYXRlLCB1bnNpZ25lZCBsb25nICpwcmF0ZSkKPj4gK3sKPj4gKyAgICAgICBzdHJ1Y3Qg bWEzNWQxX2FkY19jbGtfZGl2ICpkY2xrID0gdG9fbWEzNWQxX2FkY19jbGtfZGl2KGh3KTsKPj4g Kwo+PiArICAgICAgIHJldHVybiBkaXZpZGVyX3JvdW5kX3JhdGUoaHcsIHJhdGUsIHByYXRlLCBk Y2xrLT50YWJsZSwKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIGRjbGstPndp ZHRoLCBDTEtfRElWSURFUl9ST1VORF9DTE9TRVNUKTsKPj4gK30KPj4gKwo+PiArc3RhdGljIGlu dCBtYTM1ZDFfY2xrZGl2X3NldF9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25lZCBsb25n IHJhdGUsIHVuc2lnbmVkIGxvbmcgcGFyZW50X3JhdGUpCj4+ICt7Cj4+ICsgICAgICAgaW50IHZh bHVlOwo+PiArICAgICAgIHVuc2lnbmVkIGxvbmcgZmxhZ3MgPSAwOwo+PiArICAgICAgIHUzMiBk YXRhOwo+PiArICAgICAgIHN0cnVjdCBtYTM1ZDFfYWRjX2Nsa19kaXYgKmRjbGsgPSB0b19tYTM1 ZDFfYWRjX2Nsa19kaXYoaHcpOwo+PiArCj4+ICsgICAgICAgdmFsdWUgPSBkaXZpZGVyX2dldF92 YWwocmF0ZSwgcGFyZW50X3JhdGUsIGRjbGstPnRhYmxlLAo+PiArICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgIGRjbGstPndpZHRoLCBDTEtfRElWSURFUl9ST1VORF9DTE9TRVNUKTsKPj4g Kwo+PiArICAgICAgIHNwaW5fbG9ja19pcnFzYXZlKGRjbGstPmxvY2ssIGZsYWdzKTsKPj4gKwo+ PiArICAgICAgIGRhdGEgPSByZWFkbF9yZWxheGVkKGRjbGstPnJlZyk7Cj4+ICsgICAgICAgZGF0 YSAmPSB+KGNsa19kaXZfbWFzayhkY2xrLT53aWR0aCkgPDwgZGNsay0+c2hpZnQpOwo+PiArICAg ICAgIGRhdGEgfD0gKHZhbHVlIC0gMSkgPDwgZGNsay0+c2hpZnQ7Cj4+ICsgICAgICAgZGF0YSB8 PSBkY2xrLT5tYXNrOwo+PiArICAgICAgIHdyaXRlbF9yZWxheGVkKGRhdGEsIGRjbGstPnJlZyk7 Cj4+ICsKPj4gKyAgICAgICBzcGluX3VubG9ja19pcnFyZXN0b3JlKGRjbGstPmxvY2ssIGZsYWdz KTsKPj4gKyAgICAgICByZXR1cm4gMDsKPj4gK30KPj4gKwo+PiArc3RhdGljIGNvbnN0IHN0cnVj dCBjbGtfb3BzIG1hMzVkMV9hZGNfY2xrZGl2X29wcyA9IHsKPj4gKyAgICAgICAucmVjYWxjX3Jh dGUgPSBtYTM1ZDFfY2xrZGl2X3JlY2FsY19yYXRlLAo+PiArICAgICAgIC5yb3VuZF9yYXRlID0g bWEzNWQxX2Nsa2Rpdl9yb3VuZF9yYXRlLAo+PiArICAgICAgIC5zZXRfcmF0ZSA9IG1hMzVkMV9j bGtkaXZfc2V0X3JhdGUsCj4+ICt9Owo+PiArCj4+ICtzdHJ1Y3QgY2xrX2h3ICptYTM1ZDFfcmVn X2FkY19jbGtkaXYoc3RydWN0IGRldmljZSAqZGV2LCBjb25zdCBjaGFyICpuYW1lLAo+PiArICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgc3RydWN0IGNsa19odyAqcGFyZW50X2h3 LCBzcGlubG9ja190ICpsb2NrLAo+PiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgdW5zaWduZWQgbG9uZyBmbGFncywgdm9pZCBfX2lvbWVtICpyZWcsCj4+ICsgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICB1OCBzaGlmdCwgdTggd2lkdGgsIHUzMiBtYXNrX2Jp dCkKPj4gK3sKPj4gKyAgICAgICBzdHJ1Y3QgbWEzNWQxX2FkY19jbGtfZGl2ICpkaXY7Cj4+ICsg ICAgICAgc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKPj4gKyAgICAgICBzdHJ1Y3QgY2xrX2Rp dl90YWJsZSAqdGFibGU7Cj4+ICsgICAgICAgc3RydWN0IGNsa19wYXJlbnRfZGF0YSBwZGF0YSA9 IHsgLmluZGV4ID0gMCB9Owo+PiArICAgICAgIHUzMiBtYXhfZGl2LCBtaW5fZGl2Owo+PiArICAg ICAgIHN0cnVjdCBjbGtfaHcgKmh3Owo+PiArICAgICAgIGludCByZXQ7Cj4+ICsgICAgICAgaW50 IGk7Cj4+ICsKPj4gKyAgICAgICBkaXYgPSBkZXZtX2t6YWxsb2MoZGV2LCBzaXplb2YoKmRpdiks IEdGUF9LRVJORUwpOwo+PiArICAgICAgIGlmICghZGl2KQo+PiArICAgICAgICAgICAgICAgcmV0 dXJuIEVSUl9QVFIoLUVOT01FTSk7Cj4+ICsKPj4gKyAgICAgICBtYXhfZGl2ID0gY2xrX2Rpdl9t YXNrKHdpZHRoKSArIDE7Cj4+ICsgICAgICAgbWluX2RpdiA9IDE7Cj4+ICsKPj4gKyAgICAgICB0 YWJsZSA9IGRldm1fa2NhbGxvYyhkZXYsIG1heF9kaXYgKyAxLCBzaXplb2YoKnRhYmxlKSwgR0ZQ X0tFUk5FTCk7Cj4+ICsgICAgICAgaWYgKCF0YWJsZSkKPj4gKyAgICAgICAgICAgICAgIHJldHVy biBFUlJfUFRSKC1FTk9NRU0pOwo+PiArCj4+ICsgICAgICAgZm9yIChpID0gMDsgaSA8IG1heF9k aXY7IGkrKykgewo+PiArICAgICAgICAgICAgICAgdGFibGVbaV0udmFsID0gbWluX2RpdiArIGk7 Cj4+ICsgICAgICAgICAgICAgICB0YWJsZVtpXS5kaXYgPSAyICogdGFibGVbaV0udmFsOwo+PiAr ICAgICAgIH0KPj4gKyAgICAgICB0YWJsZVttYXhfZGl2XS52YWwgPSAwOwo+PiArICAgICAgIHRh YmxlW21heF9kaXZdLmRpdiA9IDA7Cj4+ICsKPj4gKyAgICAgICBtZW1zZXQoJmluaXQsIDAsIHNp emVvZihpbml0KSk7Cj4+ICsgICAgICAgaW5pdC5uYW1lID0gbmFtZTsKPj4gKyAgICAgICBpbml0 Lm9wcyA9ICZtYTM1ZDFfYWRjX2Nsa2Rpdl9vcHM7Cj4+ICsgICAgICAgaW5pdC5mbGFncyB8PSBm bGFnczsKPj4gKyAgICAgICBwZGF0YS5odyA9IHBhcmVudF9odzsKPj4gKyAgICAgICBpbml0LnBh cmVudF9kYXRhID0gJnBkYXRhOwo+PiArICAgICAgIGluaXQubnVtX3BhcmVudHMgPSAxOwo+PiAr Cj4+ICsgICAgICAgZGl2LT5yZWcgPSByZWc7Cj4+ICsgICAgICAgZGl2LT5zaGlmdCA9IHNoaWZ0 Owo+PiArICAgICAgIGRpdi0+d2lkdGggPSB3aWR0aDsKPj4gKyAgICAgICBkaXYtPm1hc2sgPSBt YXNrX2JpdCA/IEJJVChtYXNrX2JpdCkgOiAwOwo+PiArICAgICAgIGRpdi0+bG9jayA9IGxvY2s7 Cj4+ICsgICAgICAgZGl2LT5ody5pbml0ID0gJmluaXQ7Cj4+ICsgICAgICAgZGl2LT50YWJsZSA9 IHRhYmxlOwo+PiArCj4+ICsgICAgICAgaHcgPSAmZGl2LT5odzsKPj4gKyAgICAgICByZXQgPSBk ZXZtX2Nsa19od19yZWdpc3RlcihkZXYsIGh3KTsKPj4gKyAgICAgICBpZiAocmV0KQo+PiArICAg ICAgICAgICAgICAgcmV0dXJuIEVSUl9QVFIocmV0KTsKPj4gKyAgICAgICByZXR1cm4gaHc7Cj4+ ICt9Cj4+ICtFWFBPUlRfU1lNQk9MX0dQTChtYTM1ZDFfcmVnX2FkY19jbGtkaXYpOwo+PiBkaWZm IC0tZ2l0IGEvZHJpdmVycy9jbGsvbnV2b3Rvbi9jbGstbWEzNWQxLXBsbC5jIGIvZHJpdmVycy9j bGsvbnV2b3Rvbi9jbGstbWEzNWQxLXBsbC5jCj4+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0Cj4+IGlu ZGV4IDAwMDAwMDAwMDAwMC4uZTRjOWY5NGU2Nzk2Cj4+IC0tLSAvZGV2L251bGwKPj4gKysrIGIv ZHJpdmVycy9jbGsvbnV2b3Rvbi9jbGstbWEzNWQxLXBsbC5jCj4+IEBAIC0wLDAgKzEsMzYxIEBA Cj4+ICsvLyBTUERYLUxpY2Vuc2UtSWRlbnRpZmllcjogR1BMLTIuMC1vbmx5Cj4+ICsvKgo+PiAr ICogQ29weXJpZ2h0IChDKSAyMDIzIE51dm90b24gVGVjaG5vbG9neSBDb3JwLgo+PiArICogQXV0 aG9yOiBDaGktRmFuZyBMaSA8Y2ZsaTBAbnV2b3Rvbi5jb20+Cj4+ICsgKi8KPj4gKwo+PiArI2lu Y2x1ZGUgPGxpbnV4L2JpdGZpZWxkLmg+Cj4+ICsjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVy Lmg+Cj4+ICsjaW5jbHVkZSA8bGludXgvY29udGFpbmVyX29mLmg+Cj4+ICsjaW5jbHVkZSA8bGlu dXgvZGV2aWNlLmg+Cj4+ICsjaW5jbHVkZSA8bGludXgvaW8uaD4KPj4gKyNpbmNsdWRlIDxsaW51 eC9rZXJuZWwuaD4KPj4gKyNpbmNsdWRlIDxsaW51eC9tYXRoNjQuaD4KPj4gKyNpbmNsdWRlIDxs aW51eC9zbGFiLmg+Cj4+ICsjaW5jbHVkZSA8bGludXgvdW5pdHMuaD4KPj4gKyNpbmNsdWRlIDxk dC1iaW5kaW5ncy9jbG9jay9udXZvdG9uLG1hMzVkMS1jbGsuaD4KPj4gKwo+PiArLyogUExMIGZy ZXF1ZW5jeSBsaW1pdHMgKi8KPj4gKyNkZWZpbmUgUExMX0ZSRUZfTUFYX0ZSRVEgICAgICAoMjAw ICogSFpfUEVSX01IWikKPj4gKyNkZWZpbmUgUExMX0ZSRUZfTUlOX0ZSRVEgICAgICAoMSAqIEha X1BFUl9NSFopCj4+ICsjZGVmaW5lIFBMTF9GUkVGX01fTUFYX0ZSRVEgICAgKDQwICogSFpfUEVS X01IWikKPj4gKyNkZWZpbmUgUExMX0ZSRUZfTV9NSU5fRlJFUSAgICAoMTAgKiBIWl9QRVJfTUha KQo+PiArI2RlZmluZSBQTExfRkNMS19NQVhfRlJFUSAgICAgICgyNDAwICogSFpfUEVSX01IWikK Pj4gKyNkZWZpbmUgUExMX0ZDTEtfTUlOX0ZSRVEgICAgICAoNjAwICogSFpfUEVSX01IWikKPj4g KyNkZWZpbmUgUExMX0ZDTEtPX01BWF9GUkVRICAgICAoMjQwMCAqIEhaX1BFUl9NSFopCj4+ICsj ZGVmaW5lIFBMTF9GQ0xLT19NSU5fRlJFUSAgICAgKDg1NzAwICogSFpfUEVSX0tIWikKPj4gKyNk ZWZpbmUgUExMX1NTX1JBVEUgICAgICAgICAgICAweDc3Cj4+ICsjZGVmaW5lIFBMTF9TTE9QRSAg ICAgICAgICAgICAgMHg1OENGQQo+PiArCj4+ICsjZGVmaW5lIFJFR19QTExfQ1RMMF9PRkZTRVQg ICAgMHgwCj4+ICsjZGVmaW5lIFJFR19QTExfQ1RMMV9PRkZTRVQgICAgMHg0Cj4+ICsjZGVmaW5l IFJFR19QTExfQ1RMMl9PRkZTRVQgICAgMHg4Cj4+ICsKPj4gKy8qIGJpdCBmaWVsZHMgZm9yIFJF R19DTEtfUExMMENUTDAsIHdoaWNoIGlzIFNNSUMgUExMIGRlc2lnbiAqLwo+PiArI2RlZmluZSBT UExMMF9DVEwwX0ZCRElWICAgICAgIEdFTk1BU0soNywgMCkKPj4gKyNkZWZpbmUgU1BMTDBfQ1RM MF9JTkRJViAgICAgICBHRU5NQVNLKDExLCA4KQo+PiArI2RlZmluZSBTUExMMF9DVEwwX09VVERJ ViAgICAgIEdFTk1BU0soMTMsIDEyKQo+PiArI2RlZmluZSBTUExMMF9DVEwwX1BEICAgICAgICAg IEJJVCgxNikKPj4gKyNkZWZpbmUgU1BMTDBfQ1RMMF9CUCAgICAgICAgICBCSVQoMTcpCj4+ICsK Pj4gKy8qIGJpdCBmaWVsZHMgZm9yIFJFR19DTEtfUExMeENUTDAgfiBSRUdfQ0xLX1BMTHhDVEwy LCB3aGVyZSB4ID0gMiB+IDUgKi8KPj4gKyNkZWZpbmUgUExMX0NUTDBfRkJESVYgICAgICAgICBH RU5NQVNLKDEwLCAwKQo+PiArI2RlZmluZSBQTExfQ1RMMF9JTkRJViAgICAgICAgIEdFTk1BU0so MTcsIDEyKQo+PiArI2RlZmluZSBQTExfQ1RMMF9NT0RFICAgICAgICAgIEdFTk1BU0soMTksIDE4 KQo+PiArI2RlZmluZSBQTExfQ1RMMF9TU1JBVEUgICAgICAgICAgICAgICAgR0VOTUFTSygzMCwg MjApCj4+ICsjZGVmaW5lIFBMTF9DVEwxX1BEICAgICAgICAgICAgQklUKDApCj4+ICsjZGVmaW5l IFBMTF9DVEwxX0JQICAgICAgICAgICAgQklUKDEpCj4+ICsjZGVmaW5lIFBMTF9DVEwxX09VVERJ ViAgICAgICAgICAgICAgICBHRU5NQVNLKDYsIDQpCj4+ICsjZGVmaW5lIFBMTF9DVEwxX0ZSQUMg ICAgICAgICAgR0VOTUFTSygzMSwgMjQpCj4+ICsjZGVmaW5lIFBMTF9DVEwyX1NMT1BFICAgICAg ICAgR0VOTUFTSygyMywgMCkKPj4gKwo+PiArI2RlZmluZSBJTkRJVl9NSU4gICAgICAgICAgICAg IDEKPj4gKyNkZWZpbmUgSU5ESVZfTUFYICAgICAgICAgICAgICA2Mwo+PiArI2RlZmluZSBGQkRJ Vl9NSU4gICAgICAgICAgICAgIDE2Cj4+ICsjZGVmaW5lIEZCRElWX01BWCAgICAgICAgICAgICAg MjA0Nwo+PiArI2RlZmluZSBGQkRJVl9GUkFDX01JTiAgICAgICAgIDE2MDAKPj4gKyNkZWZpbmUg RkJESVZfRlJBQ19NQVggICAgICAgICAyMDQ3MDAKPj4gKyNkZWZpbmUgT1VURElWX01JTiAgICAg ICAgICAgICAxCj4+ICsjZGVmaW5lIE9VVERJVl9NQVggICAgICAgICAgICAgNwo+PiArCj4+ICsj ZGVmaW5lIFBMTF9NT0RFX0lOVCAgICAgICAgICAgIDAKPj4gKyNkZWZpbmUgUExMX01PREVfRlJB QyAgICAgICAgICAgMQo+PiArI2RlZmluZSBQTExfTU9ERV9TUyAgICAgICAgICAgICAyCj4+ICsK Pj4gK3N0cnVjdCBtYTM1ZDFfY2xrX3BsbCB7Cj4+ICsgICAgICAgc3RydWN0IGNsa19odyBodzsK Pj4gKyAgICAgICB1MzIgaWQ7Cj4+ICsgICAgICAgdTggbW9kZTsKPj4gKyAgICAgICB2b2lkIF9f aW9tZW0gKmN0bDBfYmFzZTsKPj4gKyAgICAgICB2b2lkIF9faW9tZW0gKmN0bDFfYmFzZTsKPj4g KyAgICAgICB2b2lkIF9faW9tZW0gKmN0bDJfYmFzZTsKPj4gK307Cj4+ICsKPj4gK3N0cnVjdCBj bGtfaHcgKm1hMzVkMV9yZWdfY2xrX3BsbChzdHJ1Y3QgZGV2aWNlICpkZXYsIHUzMiBpZCwgdTgg dThtb2RlLCBjb25zdCBjaGFyICpuYW1lLAo+PiArICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgc3RydWN0IGNsa19odyAqcGFyZW50X2h3LCB2b2lkIF9faW9tZW0gKmJhc2UpOwo+IFdo eSBpcyB0aGlzIGZvcndhcmQgZGVjbGFyZWQ/CgpJIHdpbGwgcmVtb3ZlIGl0LgoKPgo+PiArCj4+ ICtzdGF0aWMgaW5saW5lIHN0cnVjdCBtYTM1ZDFfY2xrX3BsbCAqdG9fbWEzNWQxX2Nsa19wbGwo c3RydWN0IGNsa19odyAqX2h3KQo+PiArewo+PiArICAgICAgIHJldHVybiBjb250YWluZXJfb2Yo X2h3LCBzdHJ1Y3QgbWEzNWQxX2Nsa19wbGwsIGh3KTsKPj4gK30KPj4gKwo+PiArc3RhdGljIHVu c2lnbmVkIGxvbmcgbWEzNWQxX2NhbGNfc21pY19wbGxfZnJlcSh1MzIgcGxsMF9jdGwwLAo+PiAr ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIHVuc2lnbmVkIGxv bmcgcGFyZW50X3JhdGUpCj4+ICt7Cj4+ICsgICAgICAgdTMyIG0sIG4sIHAsIG91dGRpdjsKPj4g KyAgICAgICB1NjQgcGxsX2ZyZXE7Cj4+ICsKPj4gKyAgICAgICBpZiAocGxsMF9jdGwwICYgU1BM TDBfQ1RMMF9CUCkKPj4gKyAgICAgICAgICAgICAgIHJldHVybiBwYXJlbnRfcmF0ZTsKPj4gKwo+ PiArICAgICAgIG4gPSBGSUVMRF9HRVQoU1BMTDBfQ1RMMF9GQkRJViwgcGxsMF9jdGwwKTsKPj4g KyAgICAgICBtID0gRklFTERfR0VUKFNQTEwwX0NUTDBfSU5ESVYsIHBsbDBfY3RsMCk7Cj4+ICsg ICAgICAgcCA9IEZJRUxEX0dFVChTUExMMF9DVEwwX09VVERJViwgcGxsMF9jdGwwKTsKPj4gKyAg ICAgICBvdXRkaXYgPSAxIDw8IHA7Cj4+ICsgICAgICAgcGxsX2ZyZXEgPSAodTY0KXBhcmVudF9y YXRlICogbjsKPj4gKyAgICAgICBkaXZfdTY0KHBsbF9mcmVxLCBtICogb3V0ZGl2KTsKPj4gKyAg ICAgICByZXR1cm4gcGxsX2ZyZXE7Cj4+ICt9Cj4+ICsKPj4gK3N0YXRpYyB1bnNpZ25lZCBsb25n IG1hMzVkMV9jYWxjX3BsbF9mcmVxKHU4IG1vZGUsIHUzMiAqcmVnX2N0bCwgdW5zaWduZWQgbG9u ZyBwYXJlbnRfcmF0ZSkKPj4gK3sKPj4gKyAgICAgICB1bnNpZ25lZCBsb25nIHBsbF9mcmVxLCB4 Owo+PiArICAgICAgIHUzMiBtLCBuLCBwOwo+PiArCj4+ICsgICAgICAgaWYgKHJlZ19jdGxbMV0g JiBQTExfQ1RMMV9CUCkKPj4gKyAgICAgICAgICAgICAgIHJldHVybiBwYXJlbnRfcmF0ZTsKPj4g Kwo+PiArICAgICAgIG4gPSBGSUVMRF9HRVQoUExMX0NUTDBfRkJESVYsIHJlZ19jdGxbMF0pOwo+ PiArICAgICAgIG0gPSBGSUVMRF9HRVQoUExMX0NUTDBfSU5ESVYsIHJlZ19jdGxbMF0pOwo+PiAr ICAgICAgIHAgPSBGSUVMRF9HRVQoUExMX0NUTDFfT1VURElWLCByZWdfY3RsWzFdKTsKPj4gKwo+ PiArICAgICAgIGlmIChtb2RlID09IFBMTF9NT0RFX0lOVCkgewo+PiArICAgICAgICAgICAgICAg cGxsX2ZyZXEgPSAodTY0KXBhcmVudF9yYXRlICogbjsKPj4gKyAgICAgICAgICAgICAgIGRpdl91 NjQocGxsX2ZyZXEsIG0gKiBwKTsKPj4gKyAgICAgICB9IGVsc2Ugewo+PiArICAgICAgICAgICAg ICAgeCA9IEZJRUxEX0dFVChQTExfQ1RMMV9GUkFDLCByZWdfY3RsWzFdKTsKPj4gKyAgICAgICAg ICAgICAgIC8qIDIgZGVjaW1hbCBwbGFjZXMgZmxvYXRpbmcgdG8gaW50ZWdlciAoZXguIDEuMjMg dG8gMTIzKSAqLwo+PiArICAgICAgICAgICAgICAgbiA9IG4gKiAxMDAgKyAoKHggKiAxMDApIC8g RklFTERfTUFYKFBMTF9DVEwxX0ZSQUMpKTsKPj4gKyAgICAgICAgICAgICAgIHBsbF9mcmVxID0g ZGl2X3U2NChwYXJlbnRfcmF0ZSAqIG4sIDEwMCAqIG0gKiBwKTsKPj4gKyAgICAgICB9Cj4+ICsg ICAgICAgcmV0dXJuIHBsbF9mcmVxOwo+PiArfQo+PiArCj4+ICtzdGF0aWMgaW50IG1hMzVkMV9w bGxfZmluZF9jbG9zZXN0KHN0cnVjdCBtYTM1ZDFfY2xrX3BsbCAqcGxsLCB1bnNpZ25lZCBsb25n IHJhdGUsCj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgdW5zaWduZWQgbG9u ZyBwYXJlbnRfcmF0ZSwgdTMyICpyZWdfY3RsLAo+PiArICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgIHVuc2lnbmVkIGxvbmcgKmZyZXEpCj4+ICt7Cj4+ICsgICAgICAgdW5zaWduZWQg bG9uZyBtaW5fZGlmZiA9IFVMT05HX01BWDsKPj4gKyAgICAgICBpbnQgZmJkaXZfbWluLCBmYmRp dl9tYXg7Cj4+ICsgICAgICAgaW50IHAsIG0sIG47Cj4+ICsKPj4gKyAgICAgICAqZnJlcSA9IDA7 Cj4+ICsgICAgICAgaWYgKHJhdGUgPCBQTExfRkNMS09fTUlOX0ZSRVEgfHwgcmF0ZSA+IFBMTF9G Q0xLT19NQVhfRlJFUSkKPj4gKyAgICAgICAgICAgICAgIHJldHVybiAtRUlOVkFMOwo+PiArCj4+ ICsgICAgICAgaWYgKHBsbC0+bW9kZSA9PSBQTExfTU9ERV9JTlQpIHsKPj4gKyAgICAgICAgICAg ICAgIGZiZGl2X21pbiA9IEZCRElWX01JTjsKPj4gKyAgICAgICAgICAgICAgIGZiZGl2X21heCA9 IEZCRElWX01BWDsKPj4gKyAgICAgICB9IGVsc2Ugewo+PiArICAgICAgICAgICAgICAgZmJkaXZf bWluID0gRkJESVZfRlJBQ19NSU47Cj4+ICsgICAgICAgICAgICAgICBmYmRpdl9tYXggPSBGQkRJ Vl9GUkFDX01BWDsKPj4gKyAgICAgICB9Cj4+ICsKPj4gKyAgICAgICBmb3IgKG0gPSBJTkRJVl9N SU47IG0gPD0gSU5ESVZfTUFYOyBtKyspIHsKPj4gKyAgICAgICAgICAgICAgIGZvciAobiA9IGZi ZGl2X21pbjsgbiA8PSBmYmRpdl9tYXg7IG4rKykgewo+PiArICAgICAgICAgICAgICAgICAgICAg ICBmb3IgKHAgPSBPVVRESVZfTUlOOyBwIDw9IE9VVERJVl9NQVg7IHArKykgewo+PiArICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgIHVuc2lnbmVkIGxvbmcgdG1wLCBmb3V0LCBmY2xrLCBk aWZmOwo+PiArCj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgdG1wID0gZGl2X3U2 NChwYXJlbnRfcmF0ZSwgbSk7Cj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgaWYg KHRtcCA8IFBMTF9GUkVGX01fTUlOX0ZSRVEgfHwKPj4gKyAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgdG1wID4gUExMX0ZSRUZfTV9NQVhfRlJFUSkKPj4gKyAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgIGNvbnRpbnVlOyAvKiBjb25zdHJhaW4gKi8KPj4gKwo+ PiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIGZjbGsgPSBkaXZfdTY0KHBhcmVudF9y YXRlICogbiwgbSk7Cj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgLyogZm9yIDIg ZGVjaW1hbCBwbGFjZXMgKi8KPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBpZiAo cGxsLT5tb2RlICE9IFBMTF9NT0RFX0lOVCkKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgIGZjbGsgPSBkaXZfdTY0KGZjbGssIDEwMCk7Cj4+ICsKPj4gKyAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICBpZiAoZmNsayA8IFBMTF9GQ0xLX01JTl9GUkVRIHx8Cj4+ ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIGZjbGsgPiBQTExfRkNMS19NQVhf RlJFUSkKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIGNvbnRpbnVl OyAvKiBjb25zdHJhaW4gKi8KPj4gKwo+PiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg IGZvdXQgPSBkaXZfdTY0KGZjbGssIHApOwo+PiArICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgIGlmIChmb3V0IDwgUExMX0ZDTEtPX01JTl9GUkVRIHx8Cj4+ICsgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgIGZvdXQgPiBQTExfRkNMS09fTUFYX0ZSRVEpCj4+ICsgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBjb250aW51ZTsgLyogY29uc3RyYWluICov Cj4+ICsKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBkaWZmID0gYWJzKHJhdGUg LSBmb3V0KTsKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBpZiAoZGlmZiA8IG1p bl9kaWZmKSB7Cj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICByZWdf Y3RsWzBdID0gRklFTERfUFJFUChQTExfQ1RMMF9JTkRJViwgbSkgfAo+PiArICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIEZJRUxEX1BSRVAoUExMX0NU TDBfRkJESVYsIG4pOwo+PiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg cmVnX2N0bFsxXSA9IEZJRUxEX1BSRVAoUExMX0NUTDFfT1VURElWLCBwKTsKPj4gKyAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICpmcmVxID0gZm91dDsKPj4gKyAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIG1pbl9kaWZmID0gZGlmZjsKPj4gKyAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIGlmIChtaW5fZGlmZiA9PSAwKQo+PiAr ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBicmVhazsKPj4g KyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICB9Cj4+ICsgICAgICAgICAgICAgICAgICAg ICAgIH0KPj4gKyAgICAgICAgICAgICAgIH0KPj4gKyAgICAgICB9Cj4+ICsgICAgICAgaWYgKCpm cmVxID09IDApCj4+ICsgICAgICAgICAgICAgICByZXR1cm4gLUVJTlZBTDsgLyogY2Fubm90IGZp bmQgZXZlbiBvbmUgdmFsaWQgc2V0dGluZyAqLwo+PiArICAgICAgIHJldHVybiAwOwo+PiArfQo+ PiArCj4+ICtzdGF0aWMgaW50IG1hMzVkMV9jbGtfcGxsX3NldF9yYXRlKHN0cnVjdCBjbGtfaHcg Kmh3LCB1bnNpZ25lZCBsb25nIHJhdGUsCj4+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgdW5zaWduZWQgbG9uZyBwYXJlbnRfcmF0ZSkKPj4gK3sKPj4gKyAgICAgICBzdHJ1Y3Qg bWEzNWQxX2Nsa19wbGwgKnBsbCA9IHRvX21hMzVkMV9jbGtfcGxsKGh3KTsKPj4gKyAgICAgICB1 MzIgcmVnX2N0bFszXSA9IHsgMCB9Owo+PiArICAgICAgIHVuc2lnbmVkIGxvbmcgcGxsX2ZyZXE7 Cj4+ICsgICAgICAgaW50IHJldDsKPj4gKwo+PiArICAgICAgIGlmIChwYXJlbnRfcmF0ZSA8IFBM TF9GUkVGX01JTl9GUkVRIHx8IHBhcmVudF9yYXRlID4gUExMX0ZSRUZfTUFYX0ZSRVEpCj4+ICsg ICAgICAgICAgICAgICByZXR1cm4gLUVJTlZBTDsKPj4gKwo+PiArICAgICAgIHJldCA9IG1hMzVk MV9wbGxfZmluZF9jbG9zZXN0KHBsbCwgcmF0ZSwgcGFyZW50X3JhdGUsIHJlZ19jdGwsICZwbGxf ZnJlcSk7Cj4+ICsgICAgICAgaWYgKHJldCAhPSAwKQo+PiArICAgICAgICAgICAgICAgcmV0dXJu IHJldDsKPj4gKwo+PiArICAgICAgIHN3aXRjaCAocGxsLT5tb2RlKSB7Cj4+ICsgICAgICAgY2Fz ZSBQTExfTU9ERV9JTlQ6Cj4+ICsgICAgICAgICAgICAgICByZWdfY3RsWzBdIHw9IEZJRUxEX1BS RVAoUExMX0NUTDBfTU9ERSwgUExMX01PREVfSU5UKTsKPj4gKyAgICAgICAgICAgICAgIGJyZWFr Owo+PiArICAgICAgIGNhc2UgUExMX01PREVfRlJBQzoKPj4gKyAgICAgICAgICAgICAgIHJlZ19j dGxbMF0gfD0gRklFTERfUFJFUChQTExfQ1RMMF9NT0RFLCBQTExfTU9ERV9GUkFDKTsKPj4gKyAg ICAgICAgICAgICAgIGJyZWFrOwo+PiArICAgICAgIGNhc2UgUExMX01PREVfU1M6Cj4+ICsgICAg ICAgICAgICAgICByZWdfY3RsWzBdIHw9IEZJRUxEX1BSRVAoUExMX0NUTDBfTU9ERSwgUExMX01P REVfU1MpIHwKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgRklFTERfUFJFUChQTExf Q1RMMF9TU1JBVEUsIFBMTF9TU19SQVRFKTsKPj4gKyAgICAgICAgICAgICAgIHJlZ19jdGxbMl0g PSBGSUVMRF9QUkVQKFBMTF9DVEwyX1NMT1BFLCBQTExfU0xPUEUpOwo+PiArICAgICAgICAgICAg ICAgYnJlYWs7Cj4+ICsgICAgICAgfQo+PiArICAgICAgIHJlZ19jdGxbMV0gfD0gUExMX0NUTDFf UEQ7Cj4+ICsKPj4gKyAgICAgICB3cml0ZWxfcmVsYXhlZChyZWdfY3RsWzBdLCBwbGwtPmN0bDBf YmFzZSk7Cj4+ICsgICAgICAgd3JpdGVsX3JlbGF4ZWQocmVnX2N0bFsxXSwgcGxsLT5jdGwxX2Jh c2UpOwo+PiArICAgICAgIHdyaXRlbF9yZWxheGVkKHJlZ19jdGxbMl0sIHBsbC0+Y3RsMl9iYXNl KTsKPj4gKyAgICAgICByZXR1cm4gMDsKPj4gK30KPj4gKwo+PiArc3RhdGljIHVuc2lnbmVkIGxv bmcgbWEzNWQxX2Nsa19wbGxfcmVjYWxjX3JhdGUoc3RydWN0IGNsa19odyAqaHcsIHVuc2lnbmVk IGxvbmcgcGFyZW50X3JhdGUpCj4+ICt7Cj4+ICsgICAgICAgc3RydWN0IG1hMzVkMV9jbGtfcGxs ICpwbGwgPSB0b19tYTM1ZDFfY2xrX3BsbChodyk7Cj4+ICsgICAgICAgdTMyIHJlZ19jdGxbM107 Cj4+ICsgICAgICAgdW5zaWduZWQgbG9uZyBwbGxfZnJlcTsKPj4gKwo+PiArICAgICAgIGlmIChw YXJlbnRfcmF0ZSA8IFBMTF9GUkVGX01JTl9GUkVRIHx8IHBhcmVudF9yYXRlID4gUExMX0ZSRUZf TUFYX0ZSRVEpCj4+ICsgICAgICAgICAgICAgICByZXR1cm4gMDsKPj4gKwo+PiArICAgICAgIHN3 aXRjaCAocGxsLT5pZCkgewo+PiArICAgICAgIGNhc2UgQ0FQTEw6Cj4+ICsgICAgICAgICAgICAg ICByZWdfY3RsWzBdID0gcmVhZGxfcmVsYXhlZChwbGwtPmN0bDBfYmFzZSk7Cj4+ICsgICAgICAg ICAgICAgICBwbGxfZnJlcSA9IG1hMzVkMV9jYWxjX3NtaWNfcGxsX2ZyZXEocmVnX2N0bFswXSwg cGFyZW50X3JhdGUpOwo+PiArICAgICAgICAgICAgICAgcmV0dXJuIHBsbF9mcmVxOwo+PiArICAg ICAgIGNhc2UgRERSUExMOgo+PiArICAgICAgIGNhc2UgQVBMTDoKPj4gKyAgICAgICBjYXNlIEVQ TEw6Cj4+ICsgICAgICAgY2FzZSBWUExMOgo+PiArICAgICAgICAgICAgICAgcmVnX2N0bFswXSA9 IHJlYWRsX3JlbGF4ZWQocGxsLT5jdGwwX2Jhc2UpOwo+PiArICAgICAgICAgICAgICAgcmVnX2N0 bFsxXSA9IHJlYWRsX3JlbGF4ZWQocGxsLT5jdGwxX2Jhc2UpOwo+PiArICAgICAgICAgICAgICAg cGxsX2ZyZXEgPSBtYTM1ZDFfY2FsY19wbGxfZnJlcShwbGwtPm1vZGUsIHJlZ19jdGwsIHBhcmVu dF9yYXRlKTsKPj4gKyAgICAgICAgICAgICAgIHJldHVybiBwbGxfZnJlcTsKPj4gKyAgICAgICB9 Cj4+ICsgICAgICAgcmV0dXJuIDA7Cj4+ICt9Cj4+ICsKPj4gK3N0YXRpYyBsb25nIG1hMzVkMV9j bGtfcGxsX3JvdW5kX3JhdGUoc3RydWN0IGNsa19odyAqaHcsIHVuc2lnbmVkIGxvbmcgcmF0ZSwK Pj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICB1bnNpZ25lZCBsb25nICpw YXJlbnRfcmF0ZSkKPj4gK3sKPj4gKyAgICAgICBzdHJ1Y3QgbWEzNWQxX2Nsa19wbGwgKnBsbCA9 IHRvX21hMzVkMV9jbGtfcGxsKGh3KTsKPj4gKyAgICAgICB1MzIgcmVnX2N0bFszXSA9IHsgMCB9 Owo+PiArICAgICAgIHVuc2lnbmVkIGxvbmcgcGxsX2ZyZXE7Cj4+ICsgICAgICAgbG9uZyByZXQ7 Cj4+ICsKPj4gKyAgICAgICBpZiAoKnBhcmVudF9yYXRlIDwgUExMX0ZSRUZfTUlOX0ZSRVEgfHwg KnBhcmVudF9yYXRlID4gUExMX0ZSRUZfTUFYX0ZSRVEpCj4+ICsgICAgICAgICAgICAgICByZXR1 cm4gLUVJTlZBTDsKPj4gKwo+PiArICAgICAgIHJldCA9IG1hMzVkMV9wbGxfZmluZF9jbG9zZXN0 KHBsbCwgcmF0ZSwgKnBhcmVudF9yYXRlLCByZWdfY3RsLCAmcGxsX2ZyZXEpOwo+PiArICAgICAg IGlmIChyZXQgPCAwKQo+PiArICAgICAgICAgICAgICAgcmV0dXJuIHJldDsKPj4gKwo+PiArICAg ICAgIHN3aXRjaCAocGxsLT5pZCkgewo+PiArICAgICAgIGNhc2UgQ0FQTEw6Cj4+ICsgICAgICAg ICAgICAgICByZWdfY3RsWzBdID0gcmVhZGxfcmVsYXhlZChwbGwtPmN0bDBfYmFzZSk7Cj4+ICsg ICAgICAgICAgICAgICBwbGxfZnJlcSA9IG1hMzVkMV9jYWxjX3NtaWNfcGxsX2ZyZXEocmVnX2N0 bFswXSwgKnBhcmVudF9yYXRlKTsKPj4gKyAgICAgICAgICAgICAgIHJldHVybiBwbGxfZnJlcTsK Pj4gKyAgICAgICBjYXNlIEREUlBMTDoKPj4gKyAgICAgICBjYXNlIEFQTEw6Cj4+ICsgICAgICAg Y2FzZSBFUExMOgo+PiArICAgICAgIGNhc2UgVlBMTDoKPj4gKyAgICAgICAgICAgICAgIHJlZ19j dGxbMF0gPSByZWFkbF9yZWxheGVkKHBsbC0+Y3RsMF9iYXNlKTsKPj4gKyAgICAgICAgICAgICAg IHJlZ19jdGxbMV0gPSByZWFkbF9yZWxheGVkKHBsbC0+Y3RsMV9iYXNlKTsKPj4gKyAgICAgICAg ICAgICAgIHBsbF9mcmVxID0gbWEzNWQxX2NhbGNfcGxsX2ZyZXEocGxsLT5tb2RlLCByZWdfY3Rs LCAqcGFyZW50X3JhdGUpOwo+PiArICAgICAgICAgICAgICAgcmV0dXJuIHBsbF9mcmVxOwo+PiAr ICAgICAgIH0KPj4gKyAgICAgICByZXR1cm4gMDsKPj4gK30KPj4gKwo+PiArc3RhdGljIGludCBt YTM1ZDFfY2xrX3BsbF9pc19wcmVwYXJlZChzdHJ1Y3QgY2xrX2h3ICpodykKPj4gK3sKPj4gKyAg ICAgICBzdHJ1Y3QgbWEzNWQxX2Nsa19wbGwgKnBsbCA9IHRvX21hMzVkMV9jbGtfcGxsKGh3KTsK Pj4gKyAgICAgICB1MzIgdmFsID0gcmVhZGxfcmVsYXhlZChwbGwtPmN0bDFfYmFzZSk7Cj4+ICsK Pj4gKyAgICAgICByZXR1cm4gISh2YWwgJiBQTExfQ1RMMV9QRCk7Cj4+ICt9Cj4+ICsKPj4gK3N0 YXRpYyBpbnQgbWEzNWQxX2Nsa19wbGxfcHJlcGFyZShzdHJ1Y3QgY2xrX2h3ICpodykKPj4gK3sK Pj4gKyAgICAgICBzdHJ1Y3QgbWEzNWQxX2Nsa19wbGwgKnBsbCA9IHRvX21hMzVkMV9jbGtfcGxs KGh3KTsKPj4gKyAgICAgICB1MzIgdmFsOwo+PiArCj4+ICsgICAgICAgdmFsID0gcmVhZGxfcmVs YXhlZChwbGwtPmN0bDFfYmFzZSk7Cj4+ICsgICAgICAgdmFsICY9IH5QTExfQ1RMMV9QRDsKPj4g KyAgICAgICB3cml0ZWxfcmVsYXhlZCh2YWwsIHBsbC0+Y3RsMV9iYXNlKTsKPj4gKyAgICAgICBy ZXR1cm4gMDsKPj4gK30KPj4gKwo+PiArc3RhdGljIHZvaWQgbWEzNWQxX2Nsa19wbGxfdW5wcmVw YXJlKHN0cnVjdCBjbGtfaHcgKmh3KQo+PiArewo+PiArICAgICAgIHN0cnVjdCBtYTM1ZDFfY2xr X3BsbCAqcGxsID0gdG9fbWEzNWQxX2Nsa19wbGwoaHcpOwo+PiArICAgICAgIHUzMiB2YWw7Cj4+ ICsKPj4gKyAgICAgICB2YWwgPSByZWFkbF9yZWxheGVkKHBsbC0+Y3RsMV9iYXNlKTsKPj4gKyAg ICAgICB2YWwgfD0gUExMX0NUTDFfUEQ7Cj4+ICsgICAgICAgd3JpdGVsX3JlbGF4ZWQodmFsLCBw bGwtPmN0bDFfYmFzZSk7Cj4+ICt9Cj4+ICsKPj4gK3N0YXRpYyBjb25zdCBzdHJ1Y3QgY2xrX29w cyBtYTM1ZDFfY2xrX3BsbF9vcHMgPSB7Cj4+ICsgICAgICAgLmlzX3ByZXBhcmVkID0gbWEzNWQx X2Nsa19wbGxfaXNfcHJlcGFyZWQsCj4+ICsgICAgICAgLnByZXBhcmUgPSBtYTM1ZDFfY2xrX3Bs bF9wcmVwYXJlLAo+PiArICAgICAgIC51bnByZXBhcmUgPSBtYTM1ZDFfY2xrX3BsbF91bnByZXBh cmUsCj4+ICsgICAgICAgLnNldF9yYXRlID0gbWEzNWQxX2Nsa19wbGxfc2V0X3JhdGUsCj4+ICsg ICAgICAgLnJlY2FsY19yYXRlID0gbWEzNWQxX2Nsa19wbGxfcmVjYWxjX3JhdGUsCj4+ICsgICAg ICAgLnJvdW5kX3JhdGUgPSBtYTM1ZDFfY2xrX3BsbF9yb3VuZF9yYXRlLAo+PiArfTsKPj4gKwo+ PiArc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIG1hMzVkMV9jbGtfZml4ZWRfcGxsX29wcyA9 IHsKPj4gKyAgICAgICAucmVjYWxjX3JhdGUgPSBtYTM1ZDFfY2xrX3BsbF9yZWNhbGNfcmF0ZSwK Pj4gKyAgICAgICAucm91bmRfcmF0ZSA9IG1hMzVkMV9jbGtfcGxsX3JvdW5kX3JhdGUsCj4+ICt9 Owo+PiArCj4+ICtzdHJ1Y3QgY2xrX2h3ICptYTM1ZDFfcmVnX2Nsa19wbGwoc3RydWN0IGRldmlj ZSAqZGV2LCB1MzIgaWQsIHU4IHU4bW9kZSwgY29uc3QgY2hhciAqbmFtZSwKPj4gKyAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgIHN0cnVjdCBjbGtfaHcgKnBhcmVudF9odywgdm9pZCBf X2lvbWVtICpiYXNlKQo+PiArewo+PiArICAgICAgIHN0cnVjdCBjbGtfcGFyZW50X2RhdGEgcGRh dGEgPSB7IC5pbmRleCA9IDAgfTsKPj4gKyAgICAgICBzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0 ID0ge307Cj4+ICsgICAgICAgc3RydWN0IG1hMzVkMV9jbGtfcGxsICpwbGw7Cj4+ICsgICAgICAg c3RydWN0IGNsa19odyAqaHc7Cj4+ICsgICAgICAgaW50IHJldDsKPj4gKwo+PiArICAgICAgIHBs bCA9IGRldm1fa3phbGxvYyhkZXYsIHNpemVvZigqcGxsKSwgR0ZQX0tFUk5FTCk7Cj4+ICsgICAg ICAgaWYgKCFwbGwpCj4+ICsgICAgICAgICAgICAgICByZXR1cm4gRVJSX1BUUigtRU5PTUVNKTsK Pj4gKwo+PiArICAgICAgIHBsbC0+aWQgPSBpZDsKPj4gKyAgICAgICBwbGwtPm1vZGUgPSB1OG1v ZGU7Cj4+ICsgICAgICAgcGxsLT5jdGwwX2Jhc2UgPSBiYXNlICsgUkVHX1BMTF9DVEwwX09GRlNF VDsKPj4gKyAgICAgICBwbGwtPmN0bDFfYmFzZSA9IGJhc2UgKyBSRUdfUExMX0NUTDFfT0ZGU0VU Owo+PiArICAgICAgIHBsbC0+Y3RsMl9iYXNlID0gYmFzZSArIFJFR19QTExfQ1RMMl9PRkZTRVQ7 Cj4+ICsKPj4gKyAgICAgICBpbml0Lm5hbWUgPSBuYW1lOwo+PiArICAgICAgIGluaXQuZmxhZ3Mg PSAwOwo+PiArICAgICAgIHBkYXRhLmh3ID0gcGFyZW50X2h3Owo+PiArICAgICAgIGluaXQucGFy ZW50X2RhdGEgPSAmcGRhdGE7Cj4+ICsgICAgICAgaW5pdC5udW1fcGFyZW50cyA9IDE7Cj4+ICsK Pj4gKyAgICAgICBpZiAoaWQgPT0gQ0FQTEwgfHwgaWQgPT0gRERSUExMKQo+PiArICAgICAgICAg ICAgICAgaW5pdC5vcHMgPSAmbWEzNWQxX2Nsa19maXhlZF9wbGxfb3BzOwo+PiArICAgICAgIGVs c2UKPj4gKyAgICAgICAgICAgICAgIGluaXQub3BzID0gJm1hMzVkMV9jbGtfcGxsX29wczsKPj4g Kwo+PiArICAgICAgIHBsbC0+aHcuaW5pdCA9ICZpbml0Owo+PiArICAgICAgIGh3ID0gJnBsbC0+ aHc7Cj4+ICsKPj4gKyAgICAgICByZXQgPSBkZXZtX2Nsa19od19yZWdpc3RlcihkZXYsIGh3KTsK Pj4gKyAgICAgICBpZiAocmV0KQo+PiArICAgICAgICAgICAgICAgcmV0dXJuIEVSUl9QVFIocmV0 KTsKPj4gKyAgICAgICByZXR1cm4gaHc7Cj4+ICt9Cj4+ICtFWFBPUlRfU1lNQk9MX0dQTChtYTM1 ZDFfcmVnX2Nsa19wbGwpOwo+PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvbnV2b3Rvbi9jbGst bWEzNWQxLmMgYi9kcml2ZXJzL2Nsay9udXZvdG9uL2Nsay1tYTM1ZDEuYwo+PiBuZXcgZmlsZSBt b2RlIDEwMDY0NAo+PiBpbmRleCAwMDAwMDAwMDAwMDAuLjI5N2IxMTU4NWYwMAo+PiAtLS0gL2Rl di9udWxsCj4+ICsrKyBiL2RyaXZlcnMvY2xrL251dm90b24vY2xrLW1hMzVkMS5jCj4+IEBAIC0w LDAgKzEsOTMzIEBACj4+ICsvLyBTUERYLUxpY2Vuc2UtSWRlbnRpZmllcjogR1BMLTIuMC1vbmx5 Cj4+ICsvKgo+PiArICogQ29weXJpZ2h0IChDKSAyMDIzIE51dm90b24gVGVjaG5vbG9neSBDb3Jw Lgo+PiArICogQXV0aG9yOiBDaGktRmFuZyBMaSA8Y2ZsaTBAbnV2b3Rvbi5jb20+Cj4+ICsgKi8K Pj4gKwo+PiArI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgo+PiArI2luY2x1ZGUgPGxp bnV4L21mZC9zeXNjb24uaD4KPj4gKyNpbmNsdWRlIDxsaW51eC9tb2R1bGUuaD4KPj4gKyNpbmNs dWRlIDxsaW51eC9vZi5oPgo+PiArI2luY2x1ZGUgPGxpbnV4L3BsYXRmb3JtX2RldmljZS5oPgo+ PiArI2luY2x1ZGUgPGxpbnV4L3NwaW5sb2NrLmg+Cj4+ICsjaW5jbHVkZSA8ZHQtYmluZGluZ3Mv Y2xvY2svbnV2b3RvbixtYTM1ZDEtY2xrLmg+Cj4+ICsKPj4gK3N0YXRpYyBERUZJTkVfU1BJTkxP Q0sobWEzNWQxX2xvY2spOwo+PiArCj4+ICsjZGVmaW5lIFBMTF9NQVhfTlVNICAgICAgICAgICAg NQo+PiArCj4+ICsvKiBDbG9jayBDb250cm9sIFJlZ2lzdGVycyBPZmZzZXQgKi8KPj4gKyNkZWZp bmUgUkVHX0NMS19QV1JDVEwgICAgICAgICAweDAwCj4+ICsjZGVmaW5lIFJFR19DTEtfU1lTQ0xL MCAgICAgICAgICAgICAgICAweDA0Cj4+ICsjZGVmaW5lIFJFR19DTEtfU1lTQ0xLMSAgICAgICAg ICAgICAgICAweDA4Cj4+ICsjZGVmaW5lIFJFR19DTEtfQVBCQ0xLMCAgICAgICAgICAgICAgICAw eDBDCj4+ICsjZGVmaW5lIFJFR19DTEtfQVBCQ0xLMSAgICAgICAgICAgICAgICAweDEwCj4+ICsj ZGVmaW5lIFJFR19DTEtfQVBCQ0xLMiAgICAgICAgICAgICAgICAweDE0Cj4+ICsjZGVmaW5lIFJF R19DTEtfQ0xLU0VMMCAgICAgICAgICAgICAgICAweDE4Cj4+ICsjZGVmaW5lIFJFR19DTEtfQ0xL U0VMMSAgICAgICAgICAgICAgICAweDFDCj4+ICsjZGVmaW5lIFJFR19DTEtfQ0xLU0VMMiAgICAg ICAgICAgICAgICAweDIwCj4+ICsjZGVmaW5lIFJFR19DTEtfQ0xLU0VMMyAgICAgICAgICAgICAg ICAweDI0Cj4+ICsjZGVmaW5lIFJFR19DTEtfQ0xLU0VMNCAgICAgICAgICAgICAgICAweDI4Cj4+ ICsjZGVmaW5lIFJFR19DTEtfQ0xLRElWMCAgICAgICAgICAgICAgICAweDJDCj4+ICsjZGVmaW5l IFJFR19DTEtfQ0xLRElWMSAgICAgICAgICAgICAgICAweDMwCj4+ICsjZGVmaW5lIFJFR19DTEtf Q0xLRElWMiAgICAgICAgICAgICAgICAweDM0Cj4+ICsjZGVmaW5lIFJFR19DTEtfQ0xLRElWMyAg ICAgICAgICAgICAgICAweDM4Cj4+ICsjZGVmaW5lIFJFR19DTEtfQ0xLRElWNCAgICAgICAgICAg ICAgICAweDNDCj4+ICsjZGVmaW5lIFJFR19DTEtfQ0xLT0NUTCAgICAgICAgICAgICAgICAweDQw Cj4+ICsjZGVmaW5lIFJFR19DTEtfU1RBVFVTICAgICAgICAgMHg1MAo+PiArI2RlZmluZSBSRUdf Q0xLX1BMTDBDVEwwICAgICAgIDB4NjAKPj4gKyNkZWZpbmUgUkVHX0NMS19QTEwyQ1RMMCAgICAg ICAweDgwCj4+ICsjZGVmaW5lIFJFR19DTEtfUExMMkNUTDEgICAgICAgMHg4NAo+PiArI2RlZmlu ZSBSRUdfQ0xLX1BMTDJDVEwyICAgICAgIDB4ODgKPj4gKyNkZWZpbmUgUkVHX0NMS19QTEwzQ1RM MCAgICAgICAweDkwCj4+ICsjZGVmaW5lIFJFR19DTEtfUExMM0NUTDEgICAgICAgMHg5NAo+PiAr I2RlZmluZSBSRUdfQ0xLX1BMTDNDVEwyICAgICAgIDB4OTgKPj4gKyNkZWZpbmUgUkVHX0NMS19Q TEw0Q1RMMCAgICAgICAweEEwCj4+ICsjZGVmaW5lIFJFR19DTEtfUExMNENUTDEgICAgICAgMHhB NAo+PiArI2RlZmluZSBSRUdfQ0xLX1BMTDRDVEwyICAgICAgIDB4QTgKPj4gKyNkZWZpbmUgUkVH X0NMS19QTEw1Q1RMMCAgICAgICAweEIwCj4+ICsjZGVmaW5lIFJFR19DTEtfUExMNUNUTDEgICAg ICAgMHhCNAo+PiArI2RlZmluZSBSRUdfQ0xLX1BMTDVDVEwyICAgICAgIDB4QjgKPj4gKyNkZWZp bmUgUkVHX0NMS19DTEtEQ1RMICAgICAgICAgICAgICAgIDB4QzAKPj4gKyNkZWZpbmUgUkVHX0NM S19DTEtEU1RTICAgICAgICAgICAgICAgIDB4QzQKPj4gKyNkZWZpbmUgUkVHX0NMS19DRFVQQiAg ICAgICAgICAweEM4Cj4+ICsjZGVmaW5lIFJFR19DTEtfQ0RMT1dCICAgICAgICAgMHhDQwo+PiAr I2RlZmluZSBSRUdfQ0xLX0NLRkxUUkNUTCAgICAgIDB4RDAKPj4gKyNkZWZpbmUgUkVHX0NMS19U RVNUQ0xLICAgICAgICAgICAgICAgIDB4RjAKPj4gKyNkZWZpbmUgUkVHX0NMS19QTExDVEwgICAg ICAgICAweDQwCj4gUGxlYXNlIHVzZSBsb3dlcmNhc2UgaGV4LgoKSSB3aWxsIGZpeCB0aGVtLgoK Pj4gKwo+PiArI2RlZmluZSBQTExfTU9ERV9JTlQgICAgICAgICAgICAwCj4+ICsjZGVmaW5lIFBM TF9NT0RFX0ZSQUMgICAgICAgICAgIDEKPj4gKyNkZWZpbmUgUExMX01PREVfU1MgICAgICAgICAg ICAgMgo+PiArCj4+ICtzdHJ1Y3QgY2xrX2h3ICptYTM1ZDFfcmVnX2Nsa19wbGwoc3RydWN0IGRl dmljZSAqZGV2LCB1MzIgaWQsIHU4IHU4bW9kZSwKPj4gKyAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgIGNvbnN0IGNoYXIgKm5hbWUsIHN0cnVjdCBjbGtfaHcgKnBhcmVudF9odywKPj4g KyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIHZvaWQgX19pb21lbSAqYmFzZSk7Cj4+ ICtzdHJ1Y3QgY2xrX2h3ICptYTM1ZDFfcmVnX2FkY19jbGtkaXYoc3RydWN0IGRldmljZSAqZGV2 LCBjb25zdCBjaGFyICpuYW1lLAo+PiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgc3RydWN0IGNsa19odyAqaHcsIHNwaW5sb2NrX3QgKmxvY2ssCj4+ICsgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICB1bnNpZ25lZCBsb25nIGZsYWdzLCB2b2lkIF9faW9tZW0g KnJlZywKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIHU4IHNoaWZ0LCB1 OCB3aWR0aCwgdTMyIG1hc2tfYml0KTsKPiBUaGVzZSBmdW5jdGlvbiBwcm90b3R5cGVzIHNob3Vs ZCBiZSBpbiBhIGhlYWRlciBhbmQgaW5jbHVkZWQgaW4gYW55IEMKPiBmaWxlcyB0aGF0IHVzZSB0 aGVtLgoKSSB3aWxsIHJlLWNyZWF0ZSBjbGstbWEzNWQxLmggaW4gdGhlIHNhbWUgZGlyZWN0b3J5 LCBhbmQgbW92ZSB0aGVzZSBmdW5jdGlvbgpwcm90b3R5cGVzIHRvIHRoZSBoZWFkZXIgZmlsZS4K Cj4+ICsKPj4gK3N0YXRpYyBjb25zdCBzdHJ1Y3QgY2xrX3BhcmVudF9kYXRhIGNhMzVjbGtfc2Vs X2Nsa3NbXSA9IHsKPj4gKyAgICAgICB7IC5pbmRleCA9IDAgfSwgIC8qIEhYVCAqLwo+PiArICAg ICAgIHsgLmluZGV4ID0gMSB9LCAgLyogQ0FQTEwgKi8KPj4gKyAgICAgICB7IC5pbmRleCA9IDIg fSAgIC8qIEREUlBMTCAqLwo+PiArfTsKPj4gKwo+PiArc3RhdGljIGNvbnN0IGNoYXIgKmNvbnN0 IHN5c2NsazBfc2VsX2Nsa3NbXSA9IHsKPj4gKyAgICAgICAiZXBsbF9kaXYyIiwgInN5c3BsbCIK Pj4gK307Cj4+ICsKPj4gK3N0YXRpYyBjb25zdCBjaGFyICpjb25zdCBzeXNjbGsxX3NlbF9jbGtz W10gPSB7Cj4+ICsgICAgICAgImh4dCIsICJzeXNwbGwiCj4gWy4uLl0KPj4gKyAgICAgICAicGNs azAiLCAiYXBsbCIsICJkdW1teSIsICJkdW1teSIKPj4gK307Cj4+ICsKPj4gK3N0YXRpYyBjb25z dCBjaGFyICpjb25zdCBpMnMwX3NlbF9jbGtzW10gPSB7Cj4+ICsgICAgICAgImFwbGwiLCAic3lz Y2xrMV9kaXYyIiwgImR1bW15IiwgImR1bW15Igo+PiArfTsKPj4gKwo+PiArc3RhdGljIGNvbnN0 IGNoYXIgKmNvbnN0IGkyczFfc2VsX2Nsa3NbXSA9IHsKPj4gKyAgICAgICAiYXBsbCIsICJzeXNj bGsxX2RpdjIiLCAiZHVtbXkiLCAiZHVtbXkiCj4+ICt9Owo+PiArCj4+ICtzdGF0aWMgY29uc3Qg Y2hhciAqY29uc3QgY2FuX3NlbF9jbGtzW10gPSB7Cj4+ICsgICAgICAgImFwbGwiLCAidnBsbCIK Pj4gK307Cj4+ICsKPj4gK3N0YXRpYyBjb25zdCBjaGFyICpjb25zdCBja29fc2VsX2Nsa3NbXSA9 IHsKPj4gKyAgICAgICAiaHh0IiwgImx4dCIsICJoaXJjIiwgImxpcmMiLCAiY2FwbGxfZGl2NCIs ICJzeXNwbGwiLAo+PiArICAgICAgICJkZHJwbGwiLCAiZXBsbF9kaXYyIiwgImFwbGwiLCAidnBs bCIsICJkdW1teSIsICJkdW1teSIsCj4+ICsgICAgICAgImR1bW15IiwgImR1bW15IiwgImR1bW15 IiwgImR1bW15Igo+IEkgc3VzcGVjdCAiZHVtbXkiIGlzIHNvbWV0aGluZyB0aGF0IHdlIGRvbid0 IHdhbnQgdG8gdGVsbCBMaW51eCBhYm91dD8KPiBJZiBwb3NzaWJsZSwgd2Ugc2hvdWxkIHNpbXBs eSBvbWl0IGl0IGVudGlyZWx5IGZyb20gdGhlIHBhcmVudF9kYXRhCj4gYXJyYXlzLgoKVGhlIGFy cmF5IGlzIGEgbWFwcGluZyB0byBiaXQgZmllbGQgb2YgY2xvY2sgc2VsZWN0aW9uIHJlZ2lzdGVy cywgYW5kIAoiZHVtbXkiIG1lYW5zIHJlc2VydmVkLgoKSSB3aWxsIHJlbW92ZSB0aGUgdHJhaWxp bmcgImR1bW15IiwgYnV0IHdvdWxkIGxpa2UgdG8gcHJlc2VydmUgdGhlIAptaWRkbGUgImR1bW15 IiBhcyB0aGUgZm9sbG93aW5ncy4KCnN0YXRpYyBjb25zdCBjaGFyICpjb25zdCB0aW1lcjBfc2Vs X2Nsa3NbXSA9IHsKIMKgwqAgwqAiaHh0IiwgImx4dCIsICJwY2xrMCIsICJkdW1teSIsICJkdW1t eSIsICJsaXJjIiwgImR1bW15IiwgImhpcmMiCn07CgoKPj4gK307Cj4+ICsKPj4gK3N0YXRpYyBj b25zdCBjaGFyICpjb25zdCBzbWNfc2VsX2Nsa3NbXSA9IHsKPj4gKyAgICAgICAiaHh0IiwgInBj bGs0Igo+PiArfTsKPj4gKwo+PiArc3RhdGljIGNvbnN0IGNoYXIgKmNvbnN0IGtwaV9zZWxfY2xr c1tdID0gewo+PiArICAgICAgICJoeHQiLCAibHh0Igo+PiArfTsKPj4gKwo+PiArc3RhdGljIGNv bnN0IHN0cnVjdCBjbGtfZGl2X3RhYmxlIGlwX2Rpdl90YWJsZVtdID0gewo+PiArICAgICAgIHsw LCAyfSwgezEsIDR9LCB7MiwgNn0sIHszLCA4fSwgezQsIDEwfSwKPj4gKyAgICAgICB7NSwgMTJ9 LCB7NiwgMTR9LCB7NywgMTZ9LCB7MCwgMH0sCj4+ICt9Owo+PiArCj4+ICtzdGF0aWMgY29uc3Qg c3RydWN0IGNsa19kaXZfdGFibGUgZWFkY19kaXZfdGFibGVbXSA9IHsKPj4gKyAgICAgICB7MCwg Mn0sIHsxLCA0fSwgezIsIDZ9LCB7MywgOH0sIHs0LCAxMH0sCj4+ICsgICAgICAgezUsIDEyfSwg ezYsIDE0fSwgezcsIDE2fSwgezgsIDE4fSwKPj4gKyAgICAgICB7OSwgMjB9LCB7MTAsIDIyfSwg ezExLCAyNH0sIHsxMiwgMjZ9LAo+PiArICAgICAgIHsxMywgMjh9LCB7MTQsIDMwfSwgezE1LCAz Mn0sIHswLCAwfSwKPj4gK307Cj4+ICsKPj4gK3N0YXRpYyBzdHJ1Y3QgY2xrX2h3ICptYTM1ZDFf Y2xrX2ZpeGVkKGNvbnN0IGNoYXIgKm5hbWUsIGludCByYXRlKQo+PiArewo+PiArICAgICAgIHJl dHVybiBjbGtfaHdfcmVnaXN0ZXJfZml4ZWRfcmF0ZShOVUxMLCBuYW1lLCBOVUxMLCAwLCByYXRl KTsKPj4gK30KPj4gKwo+PiArc3RhdGljIHN0cnVjdCBjbGtfaHcgKm1hMzVkMV9jbGtfbXV4X3Bh cmVudChzdHJ1Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUsCj4+ICsgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgdm9pZCBfX2lvbWVtICpyZWcsIHU4IHNo aWZ0LCB1OCB3aWR0aCwKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICBjb25zdCBzdHJ1Y3QgY2xrX3BhcmVudF9kYXRhICpwZGF0YSwKPj4gKyAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICBpbnQgbnVtX3BkYXRhKQo+PiArewo+PiAr ICAgICAgIHJldHVybiBjbGtfaHdfcmVnaXN0ZXJfbXV4X3BhcmVudF9kYXRhKGRldiwgbmFtZSwg cGRhdGEsIG51bV9wZGF0YSwKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICBDTEtfU0VUX1JBVEVfTk9fUkVQQVJFTlQsIHJlZywgc2hpZnQsCj4+ICsgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgd2lkdGgsIDAsICZtYTM1 ZDFfbG9jayk7Cj4+ICt9Cj4+ICsKPj4gK3N0YXRpYyBzdHJ1Y3QgY2xrX2h3ICptYTM1ZDFfY2xr X211eChzdHJ1Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUsCj4+ICsgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICB2b2lkIF9faW9tZW0gKnJlZywgdTggc2hpZnQsIHU4 IHdpZHRoLAo+PiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgY29uc3QgY2hh ciAqY29uc3QgKnBhcmVudHMsIGludCBudW1fcGFyZW50cykKPiBQbGVhc2UgZG9uJ3QgdXNlIHN0 cmluZyBhcnJheXMgZm9yIHBhcmVudCBkZXNjcmlwdGlvbnMuIEV2ZXJ5dGhpbmcKPiBzaG91bGQg dXNlIGNsa19wYXJlbnRfZGF0YSBvciBkaXJlY3QgY2xrX2h3IHBvaW50ZXJzLgoKSSB3aWxsIHVz ZSBjbGtfcGFyZW50X2RhdGEgaW5zdGVhZCBvZiBzdHJpbmdzLgoKCkJlc3QgUmVnYXJkcywKSmFj a3kgSHVhbmcKCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f XwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmlu ZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9s aW51eC1hcm0ta2VybmVsCg==