From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laurent Pinchart Date: Sun, 23 Feb 2014 22:21:08 +0000 Subject: Re: [PATCH 2/4] ARM: shmobile: r8a7791: add IIC(B) clocks to dtsi Message-Id: <2541842.hskUeBb1Li@avalon> List-Id: References: <1389082976-22254-3-git-send-email-laurent.pinchart+renesas@ideasonboard.com> In-Reply-To: <1389082976-22254-3-git-send-email-laurent.pinchart+renesas@ideasonboard.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: linux-sh@vger.kernel.org Hi Wolfram, Thank you for the patch. On Sunday 23 February 2014 13:40:22 Wolfram Sang wrote: > From: Wolfram Sang > > Signed-off-by: Wolfram Sang > --- > arch/arm/boot/dts/r8a7791.dtsi | 11 +++++++---- > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi > index 3b2cdc8..eb2cec8 100644 > --- a/arch/arm/boot/dts/r8a7791.dtsi > +++ b/arch/arm/boot/dts/r8a7791.dtsi > @@ -674,14 +674,16 @@ > compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp- clocks"; > reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; > clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, > - <&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>; > + <&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>, > + <&hp_clk>, <&hp_clk>; > #clock-cells = <1>; > renesas,clock-indices = < > R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 > R8A7791_CLK_SDHI0 R8A7791_CLK_MMCIF0 R8A7791_CLK_CMT1 > + R8A7791_CLK_IIC0 R8A7791_CLK_IIC1 That's an arbitrary rule but we've followed it so far, could you please keep the entries sorted by value as well, here and in patch 3/4 ? > > >; > > clock-output-names > - "tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "cmt1"; > + "tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "cmt1", "i2c7", > "i2c8"; > }; > mstp5_clks: mstp5_clks@e6150144 { > compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp- > clocks"; > @@ -727,16 +729,17 @@ > reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; > clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, > <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, > - <&p_clk>; > + <&p_clk>, <&cp_clk>; > #clock-cells = <1>; > renesas,clock-indices = < > R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD > R8A7791_CLK_I2C5 R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 > R8A7791_CLK_I2C2 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0 > + R8A7791_CLK_IICDVFS > >; > > clock-output-names > "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3", > - "i2c2", "i2c1", "i2c0"; > + "i2c2", "i2c1", "i2c0", "i2c6"; > }; > mstp11_clks: mstp11_clks@e615099c { > compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp- > clocks"; -- Regards, Laurent Pinchart