diff for duplicates of <255931470039489@web30j.yandex.ru> diff --git a/a/1.txt b/N1/1.txt index 7aa0cc4..51c9012 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -4,18 +4,18 @@ > Hi, > > On 01-08-16 09:05, Icenowy Zheng wrote: ->> ?????????????????????????clocks = <&ccu CLK_A64_BUS_OHCI1>, ->> ??????????????????????????????????<&ccu CLK_A64_BUS_EHCI1>, ->> ??????????????????????????????????<&ccu CLK_A64_USB_OHCI0>, ->> ??????????????????????????????????<&ccu CLK_A64_USB_OHCI1>; +>> clocks = <&ccu CLK_A64_BUS_OHCI1>, +>> <&ccu CLK_A64_BUS_EHCI1>, +>> <&ccu CLK_A64_USB_OHCI0>, +>> <&ccu CLK_A64_USB_OHCI1>; >> ->> ?On A64, EHCI requires the matched OHCI to work. +>> On A64, EHCI requires the matched OHCI to work. > > Ah, so just like on the H3 (where this also is needed > and not documented). Yes, I feeled that A64 is like a hybrid of H3 and A33. > ->> ?And OHCI1 clock requires OHCI0 clock to work. +>> And OHCI1 clock requires OHCI0 clock to work. > > Hmm, that one is new, can you double check this ? SCLK_GATING_OHCI. @@ -31,20 +31,25 @@ P.113 of A64 user manual 1.0 > > Hans > ->> ?(But from the SoC's user manual we cannot get any infomation ->> ?about the relationship between OHCI1 clock and OHCI0 clock, ->> ?and in the manual OHCI0 clock is called OTG-OHCI) +>> (But from the SoC's user manual we cannot get any infomation +>> about the relationship between OHCI1 clock and OHCI0 clock, +>> and in the manual OHCI0 clock is called OTG-OHCI) >> ->> ?01.08.2016, 15:01, "Arnd Bergmann" <arnd@arndb.de>: ->>> ?On Sunday, July 31, 2016 7:25:36 PM CEST Icenowy Zheng wrote: ->>>> ??Allwinner A64 EHCI requires 4 clocks to be enabled. +>> 01.08.2016, 15:01, "Arnd Bergmann" <arnd@arndb.de>: +>>> On Sunday, July 31, 2016 7:25:36 PM CEST Icenowy Zheng wrote: +>>>> Allwinner A64 EHCI requires 4 clocks to be enabled. >>>> ->>>> ??Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> +>>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> >>> ->>> ?Can you say what those four clocks are? +>>> Can you say what those four clocks are? >>> ->>> ?Are you sure that it's not just a case of a clock being ->>> ?incorrectly described in the clk driver, i.e. you reference ->>> ?one clock along with its parent here? +>>> Are you sure that it's not just a case of a clock being +>>> incorrectly described in the clk driver, i.e. you reference +>>> one clock along with its parent here? >>> ->>> ?????????Arnd +>>> Arnd + +_______________________________________________ +linux-arm-kernel mailing list +linux-arm-kernel@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/a/content_digest b/N1/content_digest index f88bd3f..d0e9a67 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,10 +3,24 @@ "ref\02477355.hXm3xYUusy@wuerfel\0" "ref\0414101470035152@web9j.yandex.ru\0" "ref\001a348da-3b26-68a6-9d9f-c37d81b4fd64@redhat.com\0" - "From\0icenowy@aosc.xyz (Icenowy Zheng)\0" - "Subject\0[PATCH 3/3] ehci-platform: add the max clock number to 4\0" + "From\0Icenowy Zheng <icenowy@aosc.xyz>\0" + "Subject\0Re: [PATCH 3/3] ehci-platform: add the max clock number to 4\0" "Date\0Mon, 01 Aug 2016 16:18:09 +0800\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Hans de Goede <hdegoede@redhat.com>" + Arnd Bergmann <arnd@arndb.de> + " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" + "Cc\0Mark Rutland <mark.rutland@arm.com>" + devicetree@vger.kernel.org <devicetree@vger.kernel.org> + Reinder de Haan <patchesrdh@mveas.com> + Greg Kroah-Hartman <gregkh@linuxfoundation.org> + linux-usb@vger.kernel.org <linux-usb@vger.kernel.org> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + Kishon Vijay Abraham I <kishon@ti.com> + Tony Prisk <linux@prisktech.co.nz> + Chen-Yu Tsai <wens@csie.org> + Rob Herring <robh+dt@kernel.org> + Alan Stern <stern@rowland.harvard.edu> + " Maxime Ripard <maxime.ripard@free-electrons.com>\0" "\00:1\0" "b\0" "\n" @@ -15,18 +29,18 @@ "> Hi,\n" ">\n" "> On 01-08-16 09:05, Icenowy Zheng wrote:\n" - ">> ?????????????????????????clocks = <&ccu CLK_A64_BUS_OHCI1>,\n" - ">> ??????????????????????????????????<&ccu CLK_A64_BUS_EHCI1>,\n" - ">> ??????????????????????????????????<&ccu CLK_A64_USB_OHCI0>,\n" - ">> ??????????????????????????????????<&ccu CLK_A64_USB_OHCI1>;\n" + ">> \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240clocks = <&ccu CLK_A64_BUS_OHCI1>,\n" + ">> \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240<&ccu CLK_A64_BUS_EHCI1>,\n" + ">> \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240<&ccu CLK_A64_USB_OHCI0>,\n" + ">> \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240<&ccu CLK_A64_USB_OHCI1>;\n" ">>\n" - ">> ?On A64, EHCI requires the matched OHCI to work.\n" + ">> \302\240On A64, EHCI requires the matched OHCI to work.\n" ">\n" "> Ah, so just like on the H3 (where this also is needed\n" "> and not documented).\n" "Yes, I feeled that A64 is like a hybrid of H3 and A33.\n" ">\n" - ">> ?And OHCI1 clock requires OHCI0 clock to work.\n" + ">> \302\240And OHCI1 clock requires OHCI0 clock to work.\n" ">\n" "> Hmm, that one is new, can you double check this ?\n" "SCLK_GATING_OHCI.\n" @@ -42,22 +56,27 @@ ">\n" "> Hans\n" ">\n" - ">> ?(But from the SoC's user manual we cannot get any infomation\n" - ">> ?about the relationship between OHCI1 clock and OHCI0 clock,\n" - ">> ?and in the manual OHCI0 clock is called OTG-OHCI)\n" + ">> \302\240(But from the SoC's user manual we cannot get any infomation\n" + ">> \302\240about the relationship between OHCI1 clock and OHCI0 clock,\n" + ">> \302\240and in the manual OHCI0 clock is called OTG-OHCI)\n" ">>\n" - ">> ?01.08.2016, 15:01, \"Arnd Bergmann\" <arnd@arndb.de>:\n" - ">>> ?On Sunday, July 31, 2016 7:25:36 PM CEST Icenowy Zheng wrote:\n" - ">>>> ??Allwinner A64 EHCI requires 4 clocks to be enabled.\n" + ">> \302\24001.08.2016, 15:01, \"Arnd Bergmann\" <arnd@arndb.de>:\n" + ">>> \302\240On Sunday, July 31, 2016 7:25:36 PM CEST Icenowy Zheng wrote:\n" + ">>>> \302\240\302\240Allwinner A64 EHCI requires 4 clocks to be enabled.\n" ">>>>\n" - ">>>> ??Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>\n" + ">>>> \302\240\302\240Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>\n" ">>>\n" - ">>> ?Can you say what those four clocks are?\n" + ">>> \302\240Can you say what those four clocks are?\n" ">>>\n" - ">>> ?Are you sure that it's not just a case of a clock being\n" - ">>> ?incorrectly described in the clk driver, i.e. you reference\n" - ">>> ?one clock along with its parent here?\n" + ">>> \302\240Are you sure that it's not just a case of a clock being\n" + ">>> \302\240incorrectly described in the clk driver, i.e. you reference\n" + ">>> \302\240one clock along with its parent here?\n" ">>>\n" - >>> ?????????Arnd + ">>> \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240Arnd\n" + "\n" + "_______________________________________________\n" + "linux-arm-kernel mailing list\n" + "linux-arm-kernel@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -fff7c06b281ce77b4a3e6edd5b2f4bc8aadd426445ac0bb6a3d4426db40f68f1 +586b97c8653fa74a3fcd62d00a28242b2fa49a526a3ac5b9812a9c4a79d5d240
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