From mboxrd@z Thu Jan 1 00:00:00 1970 From: icenowy@aosc.xyz (Icenowy Zheng) Date: Mon, 01 Aug 2016 16:18:09 +0800 Subject: [PATCH 3/3] ehci-platform: add the max clock number to 4 In-Reply-To: <01a348da-3b26-68a6-9d9f-c37d81b4fd64@redhat.com> References: <20160731112536.4625-1-icenowy@aosc.xyz> <20160731112536.4625-3-icenowy@aosc.xyz> <2477355.hXm3xYUusy@wuerfel> <414101470035152@web9j.yandex.ru> <01a348da-3b26-68a6-9d9f-c37d81b4fd64@redhat.com> Message-ID: <255931470039489@web30j.yandex.ru> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org 01.08.2016, 15:27, "Hans de Goede" : > Hi, > > On 01-08-16 09:05, Icenowy Zheng wrote: >> ?????????????????????????clocks = <&ccu CLK_A64_BUS_OHCI1>, >> ??????????????????????????????????<&ccu CLK_A64_BUS_EHCI1>, >> ??????????????????????????????????<&ccu CLK_A64_USB_OHCI0>, >> ??????????????????????????????????<&ccu CLK_A64_USB_OHCI1>; >> >> ?On A64, EHCI requires the matched OHCI to work. > > Ah, so just like on the H3 (where this also is needed > and not documented). Yes, I feeled that A64 is like a hybrid of H3 and A33. > >> ?And OHCI1 clock requires OHCI0 clock to work. > > Hmm, that one is new, can you double check this ? SCLK_GATING_OHCI. Gating Special Clock For OHCI(48M and 12M) 00: Clock is OFF 01: OTG-OHCI Clock is ON 10: Clock is OFF 11:OTG-OHCI and OHCI0 Clock is ON P.113 of A64 user manual 1.0 > > Regards, > > Hans > >> ?(But from the SoC's user manual we cannot get any infomation >> ?about the relationship between OHCI1 clock and OHCI0 clock, >> ?and in the manual OHCI0 clock is called OTG-OHCI) >> >> ?01.08.2016, 15:01, "Arnd Bergmann" : >>> ?On Sunday, July 31, 2016 7:25:36 PM CEST Icenowy Zheng wrote: >>>> ??Allwinner A64 EHCI requires 4 clocks to be enabled. >>>> >>>> ??Signed-off-by: Icenowy Zheng >>> >>> ?Can you say what those four clocks are? >>> >>> ?Are you sure that it's not just a case of a clock being >>> ?incorrectly described in the clk driver, i.e. you reference >>> ?one clock along with its parent here? >>> >>> ?????????Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 From: Icenowy Zheng Subject: Re: [PATCH 3/3] ehci-platform: add the max clock number to 4 Date: Mon, 01 Aug 2016 16:18:09 +0800 Message-ID: <255931470039489@web30j.yandex.ru> References: <20160731112536.4625-1-icenowy@aosc.xyz> <20160731112536.4625-3-icenowy@aosc.xyz> <2477355.hXm3xYUusy@wuerfel> <414101470035152@web9j.yandex.ru> <01a348da-3b26-68a6-9d9f-c37d81b4fd64@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <01a348da-3b26-68a6-9d9f-c37d81b4fd64@redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Hans de Goede , Arnd Bergmann , "linux-arm-kernel@lists.infradead.org" Cc: Mark Rutland , "devicetree@vger.kernel.org" , Reinder de Haan , Greg Kroah-Hartman , "linux-usb@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Kishon Vijay Abraham I , Tony Prisk , Chen-Yu Tsai , Rob Herring , Alan Stern , Maxime Ripard List-Id: devicetree@vger.kernel.org CgowMS4wOC4yMDE2LCAxNToyNywgIkhhbnMgZGUgR29lZGUiIDxoZGVnb2VkZUByZWRoYXQuY29t PjoKPiBIaSwKPgo+IE9uIDAxLTA4LTE2IDA5OjA1LCBJY2Vub3d5IFpoZW5nIHdyb3RlOgo+PiDC oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoGNsb2NrcyA9 IDwmY2N1IENMS19BNjRfQlVTX09IQ0kxPiwKPj4gwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDC oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqA8JmNjdSBDTEtfQTY0X0JV U19FSENJMT4sCj4+IMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgPCZjY3UgQ0xLX0E2NF9VU0JfT0hDSTA+LAo+PiDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDC oMKgwqDCoDwmY2N1IENMS19BNjRfVVNCX09IQ0kxPjsKPj4KPj4gwqBPbiBBNjQsIEVIQ0kgcmVx dWlyZXMgdGhlIG1hdGNoZWQgT0hDSSB0byB3b3JrLgo+Cj4gQWgsIHNvIGp1c3QgbGlrZSBvbiB0 aGUgSDMgKHdoZXJlIHRoaXMgYWxzbyBpcyBuZWVkZWQKPiBhbmQgbm90IGRvY3VtZW50ZWQpLgpZ ZXMsIEkgZmVlbGVkIHRoYXQgQTY0IGlzIGxpa2UgYSBoeWJyaWQgb2YgSDMgYW5kIEEzMy4KPgo+ PiDCoEFuZCBPSENJMSBjbG9jayByZXF1aXJlcyBPSENJMCBjbG9jayB0byB3b3JrLgo+Cj4gSG1t LCB0aGF0IG9uZSBpcyBuZXcsIGNhbiB5b3UgZG91YmxlIGNoZWNrIHRoaXMgPwpTQ0xLX0dBVElO R19PSENJLgpHYXRpbmcgU3BlY2lhbCBDbG9jayBGb3IgT0hDSSg0OE0gYW5kIDEyTSkKMDA6IENs b2NrIGlzIE9GRgowMTogT1RHLU9IQ0kgQ2xvY2sgaXMgT04KMTA6IENsb2NrIGlzIE9GRgoxMTpP VEctT0hDSSBhbmQgT0hDSTAgQ2xvY2sgaXMgT04KClAuMTEzIG9mIEE2NCB1c2VyIG1hbnVhbCAx LjAKPgo+IFJlZ2FyZHMsCj4KPiBIYW5zCj4KPj4gwqAoQnV0IGZyb20gdGhlIFNvQydzIHVzZXIg bWFudWFsIHdlIGNhbm5vdCBnZXQgYW55IGluZm9tYXRpb24KPj4gwqBhYm91dCB0aGUgcmVsYXRp b25zaGlwIGJldHdlZW4gT0hDSTEgY2xvY2sgYW5kIE9IQ0kwIGNsb2NrLAo+PiDCoGFuZCBpbiB0 aGUgbWFudWFsIE9IQ0kwIGNsb2NrIGlzIGNhbGxlZCBPVEctT0hDSSkKPj4KPj4gwqAwMS4wOC4y MDE2LCAxNTowMSwgIkFybmQgQmVyZ21hbm4iIDxhcm5kQGFybmRiLmRlPjoKPj4+IMKgT24gU3Vu ZGF5LCBKdWx5IDMxLCAyMDE2IDc6MjU6MzYgUE0gQ0VTVCBJY2Vub3d5IFpoZW5nIHdyb3RlOgo+ Pj4+IMKgwqBBbGx3aW5uZXIgQTY0IEVIQ0kgcmVxdWlyZXMgNCBjbG9ja3MgdG8gYmUgZW5hYmxl ZC4KPj4+Pgo+Pj4+IMKgwqBTaWduZWQtb2ZmLWJ5OiBJY2Vub3d5IFpoZW5nIDxpY2Vub3d5QGFv c2MueHl6Pgo+Pj4KPj4+IMKgQ2FuIHlvdSBzYXkgd2hhdCB0aG9zZSBmb3VyIGNsb2NrcyBhcmU/ Cj4+Pgo+Pj4gwqBBcmUgeW91IHN1cmUgdGhhdCBpdCdzIG5vdCBqdXN0IGEgY2FzZSBvZiBhIGNs b2NrIGJlaW5nCj4+PiDCoGluY29ycmVjdGx5IGRlc2NyaWJlZCBpbiB0aGUgY2xrIGRyaXZlciwg aS5lLiB5b3UgcmVmZXJlbmNlCj4+PiDCoG9uZSBjbG9jayBhbG9uZyB3aXRoIGl0cyBwYXJlbnQg aGVyZT8KPj4+Cj4+PiDCoMKgwqDCoMKgwqDCoMKgwqBBcm5kCgpfX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlz dApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJh ZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0ta2VybmVsCg==