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[2001:4c4e:24ed:fa00:ace5:6db4:a62d:1e35]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45eb6cce01asm35371174f8f.11.2026.05.26.03.13.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2026 03:13:06 -0700 (PDT) From: Timur =?UTF-8?B?S3Jpc3TDs2Y=?= To: amd-gfx@lists.freedesktop.org, Alex Deucher , Natalie Vock , Mario Limonciello , John Olender , Liu Leo , Arunpravin Paneer Selvam , Christian =?UTF-8?B?S8O2bmln?= Subject: Re: [PATCH 4/4] drm/amdgpu/uvd: Fix forcing MSG, FB BOs into VCPU segment when it isn't at 0 (v2) Date: Tue, 26 May 2026 12:13:05 +0200 Message-ID: <2641264.XAFRqVoOGU@timur-max> In-Reply-To: References: <20260525113321.17953-1-timur.kristof@gmail.com> <20260525113321.17953-5-timur.kristof@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On 2026. m=C3=A1jus 26., kedd 10:10:33 k=C3=B6z=C3=A9p-eur=C3=B3pai ny=C3= =A1ri id=C5=91 Christian K=C3=B6nig=20 wrote: > On 5/25/26 13:33, Timur Krist=C3=B3f wrote: > > UVD 4.x and older can only access MSG, FEEDBACK buffers from a > > specific 256M VRAM segment that the VCPU BO is also located in. > > We already modify all placements of the given BO to ensure > > the BO is placed within this segment. > >=20 > > Previously, it always assumed that the VCPU segment is > > the first 256M of VRAM, even though under some conditions > > the VCPU BO could be allocated outside this segment, > > which made UVD non-functional as the BOs were > > not inside the same segment as the UVD VCPU BO. > >=20 > > Solve that by using the segment where the VCPU BO actually is. > >=20 > > This fixes an issue with UVD failing to initialize on SI/CIK > > when resizable BAR is enabled and the VCPU BO is allocated > > in a different segment. > >=20 > > v2: > > - For other BOs, keep using the same UVD segment as before. > >=20 > > Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/3851 > > Signed-off-by: Timur Krist=C3=B3f > > --- > >=20 > > drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 33 ++++++++++++++++++------- > > 1 file changed, 24 insertions(+), 9 deletions(-) > >=20 > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c index > > 1e59ca924abe..480bf88def46 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c > > @@ -135,7 +135,7 @@ MODULE_FIRMWARE(FIRMWARE_VEGA12); > >=20 > > MODULE_FIRMWARE(FIRMWARE_VEGA20); > > =20 > > static void amdgpu_uvd_idle_work_handler(struct work_struct *work); > >=20 > > -static void amdgpu_uvd_force_into_uvd_segment(struct amdgpu_bo *abo); > > +static void amdgpu_uvd_force_into_vcpu_segment(struct amdgpu_bo *abo); > >=20 > > static int amdgpu_uvd_create_msg_bo_helper(struct amdgpu_device *adev, > > =20 > > uint32_t size, > >=20 > > @@ -158,7 +158,7 @@ static int amdgpu_uvd_create_msg_bo_helper(struct > > amdgpu_device *adev,>=20 > > amdgpu_bo_kunmap(bo); > > amdgpu_bo_unpin(bo); > > amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); > >=20 > > - amdgpu_uvd_force_into_uvd_segment(bo); > > + amdgpu_uvd_force_into_vcpu_segment(bo); > >=20 > > r =3D ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); > > if (r) > > =09 > > goto err; > >=20 > > @@ -550,6 +550,24 @@ void amdgpu_uvd_free_handles(struct amdgpu_device > > *adev, struct drm_file *filp)>=20 > > } > > =20 > > } > >=20 > > +static void amdgpu_uvd_force_into_vcpu_segment(struct amdgpu_bo *bo) > > +{ > > + struct amdgpu_device *adev =3D amdgpu_ttm_adev(bo->tbo.bdev); > > + struct amdgpu_bo *vcpu_bo =3D adev->uvd.inst[0].vcpu_bo; > > + struct amdgpu_res_cursor vcpu_cur; > > + > > + amdgpu_res_first(vcpu_bo->tbo.resource, 0, > > + amdgpu_bo_size(vcpu_bo), &vcpu_cur); > > + > > + bo->placement.num_placement =3D 1; > > + bo->placement.placement =3D &bo->placements[0]; > > + bo->placements[0].fpfn =3D ALIGN_DOWN(vcpu_cur.start, SZ_256M) >> > > PAGE_SHIFT; + bo->placements[0].lpfn =3D bo->placements[0].fpfn +=20 (SZ_256M > > >> PAGE_SHIFT); + bo->placements[0].mem_type =3D > > vcpu_bo->tbo.resource->mem_type; > > + if (bo->placements[0].mem_type =3D=3D TTM_PL_VRAM) > > + bo->placements[0].flags |=3D TTM_PL_FLAG_CONTIGUOUS; >=20 > You need to call ttm_bo_validate() here. Can you say why? ttm_bo_validate() is already called by both callers of this function.