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diff for duplicates of <2643672.7kkyv0VVfm@phil>

diff --git a/a/1.txt b/N1/1.txt
index a5672ab..ed0d3cb 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,7 +1,6 @@
 Hi Mike, Stephen,
 
-please find below a pull request for rockchip-related clock changes for 4.1=
-0.
+please find below a pull request for rockchip-related clock changes for 4.10.
 Nothing really big stands out this time, so if it looks ok please pull.
 
 
@@ -15,15 +14,13 @@ The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
 
 are available in the git repository at:
 
-  git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git ta=
-gs/v4.10-rockchip-clk1
+  git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git tags/v4.10-rockchip-clk1
 
 for you to fetch changes up to bf92384b6d729b22916ba832b4a225ca196e98ba:
 
-  clk: rockchip: Ignore frac divisor for PLL equivalence when it's unused (=
-2016-11-05 23:16:29 +0100)
+  clk: rockchip: Ignore frac divisor for PLL equivalence when it's unused (2016-11-05 23:16:29 +0100)
 
-=2D---------------------------------------------------------------
+----------------------------------------------------------------
 PLL initialization for PLLs having both an integral and fractional mode
 (rk3036, rk3399) does now take into account the mode that the PLL is
 actually running at.
@@ -31,7 +28,7 @@ As always also some additional and optimized PLL rates for rk3066 and
 rk3399, some additional clock ids for rk3066 and some additional clocks
 on rk3399 are now sucessfully handled inside their respective driver.
 
-=2D---------------------------------------------------------------
+----------------------------------------------------------------
 Heiko Stuebner (1):
       Merge branch 'v4.10-shared/clkids' into v4.10-clk/next
 
@@ -39,10 +36,9 @@ Jianqun Xu (1):
       clk: rockchip: remove more CLK_IGNORE_UNUSED for rk3399 clocktree
 
 Julius Werner (1):
-      clk: rockchip: Ignore frac divisor for PLL equivalence when it's unus=
-ed
+      clk: rockchip: Ignore frac divisor for PLL equivalence when it's unused
 
-Pawe=C5=82 Jarosz (3):
+Paweł Jarosz (3):
       clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
       clk: rockchip: Use clock ids for cpu and peri clocks on rk3066
       clk: rockchip: add 400MHz to rk3066 clock rates table
@@ -53,7 +49,6 @@ Xing Zheng (2):
 
  drivers/clk/rockchip/clk-pll.c                |  6 ++++--
  drivers/clk/rockchip/clk-rk3188.c             | 13 +++++++------
- drivers/clk/rockchip/clk-rk3399.c             | 27 ++++++++++++++---------=
-=2D---
+ drivers/clk/rockchip/clk-rk3399.c             | 27 ++++++++++++++-------------
  include/dt-bindings/clock/rk3188-cru-common.h |  8 +++++++-
  4 files changed, 32 insertions(+), 22 deletions(-)
diff --git a/a/content_digest b/N1/content_digest
index 89ff621..d729dee 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -9,8 +9,7 @@
  "b\0"
  "Hi Mike, Stephen,\n"
  "\n"
- "please find below a pull request for rockchip-related clock changes for 4.1=\n"
- "0.\n"
+ "please find below a pull request for rockchip-related clock changes for 4.10.\n"
  "Nothing really big stands out this time, so if it looks ok please pull.\n"
  "\n"
  "\n"
@@ -24,15 +23,13 @@
  "\n"
  "are available in the git repository at:\n"
  "\n"
- "  git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git ta=\n"
- "gs/v4.10-rockchip-clk1\n"
+ "  git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git tags/v4.10-rockchip-clk1\n"
  "\n"
  "for you to fetch changes up to bf92384b6d729b22916ba832b4a225ca196e98ba:\n"
  "\n"
- "  clk: rockchip: Ignore frac divisor for PLL equivalence when it's unused (=\n"
- "2016-11-05 23:16:29 +0100)\n"
+ "  clk: rockchip: Ignore frac divisor for PLL equivalence when it's unused (2016-11-05 23:16:29 +0100)\n"
  "\n"
- "=2D---------------------------------------------------------------\n"
+ "----------------------------------------------------------------\n"
  "PLL initialization for PLLs having both an integral and fractional mode\n"
  "(rk3036, rk3399) does now take into account the mode that the PLL is\n"
  "actually running at.\n"
@@ -40,7 +37,7 @@
  "rk3399, some additional clock ids for rk3066 and some additional clocks\n"
  "on rk3399 are now sucessfully handled inside their respective driver.\n"
  "\n"
- "=2D---------------------------------------------------------------\n"
+ "----------------------------------------------------------------\n"
  "Heiko Stuebner (1):\n"
  "      Merge branch 'v4.10-shared/clkids' into v4.10-clk/next\n"
  "\n"
@@ -48,10 +45,9 @@
  "      clk: rockchip: remove more CLK_IGNORE_UNUSED for rk3399 clocktree\n"
  "\n"
  "Julius Werner (1):\n"
- "      clk: rockchip: Ignore frac divisor for PLL equivalence when it's unus=\n"
- "ed\n"
+ "      clk: rockchip: Ignore frac divisor for PLL equivalence when it's unused\n"
  "\n"
- "Pawe=C5=82 Jarosz (3):\n"
+ "Pawe\305\202 Jarosz (3):\n"
  "      clk: rockchip: Add binding ids for cpu and peri clocks on rk3066\n"
  "      clk: rockchip: Use clock ids for cpu and peri clocks on rk3066\n"
  "      clk: rockchip: add 400MHz to rk3066 clock rates table\n"
@@ -62,9 +58,8 @@
  "\n"
  " drivers/clk/rockchip/clk-pll.c                |  6 ++++--\n"
  " drivers/clk/rockchip/clk-rk3188.c             | 13 +++++++------\n"
- " drivers/clk/rockchip/clk-rk3399.c             | 27 ++++++++++++++---------=\n"
- "=2D---\n"
+ " drivers/clk/rockchip/clk-rk3399.c             | 27 ++++++++++++++-------------\n"
  " include/dt-bindings/clock/rk3188-cru-common.h |  8 +++++++-\n"
   4 files changed, 32 insertions(+), 22 deletions(-)
 
-0807d6e4b473f1f790df3f29ee610fa5673a8f3f23f9403487d5f2f47f016750
+67104e540e2772fc21052385bc9ef7a3dcff94c4d9e08cc1b0c95ab88cc23d20

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