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diff for duplicates of <2683489.TXdAHLhj84@phil>

diff --git a/a/1.txt b/N1/1.txt
index 4691bf7..7a2118a 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -7,10 +7,10 @@ Am Freitag, 21. Oktober 2016, 10:43:55 CEST schrieb Shawn Lin:
 > under MP test internally, so the backward compatibility won't be
 > a big deal.
 > 
-> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
+> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
 
 looks good from my side.
-Reviewed-by: Heiko Stuebner <heiko@sntech.de>
+Reviewed-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
 
 As Shawn wrote the soc in question (first one at all with a pcie controller) 
 has not yet found its way into any device, so no existing one can abviously be 
@@ -150,3 +150,9 @@ Heiko
 >  	rockchip->ep_gpio = devm_gpiod_get(dev, "ep", GPIOD_OUT_HIGH);
 >  	if (IS_ERR(rockchip->ep_gpio)) {
 >  		dev_err(dev, "missing ep-gpios property in node\n");
+
+
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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diff --git a/a/content_digest b/N1/content_digest
index fc03405..bacb6a1 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,15 +1,16 @@
  "ref\01477017836-19317-1-git-send-email-shawn.lin@rock-chips.com\0"
  "ref\01477017836-19317-2-git-send-email-shawn.lin@rock-chips.com\0"
- "From\0Heiko Stuebner <heiko@sntech.de>\0"
+ "ref\01477017836-19317-2-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org\0"
+ "From\0Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\0"
  "Subject\0Re: [PATCH 1/2] PCI: rockchip: Add three new resets as required properties\0"
  "Date\0Fri, 21 Oct 2016 09:56:26 +0200\0"
- "To\0Shawn Lin <shawn.lin@rock-chips.com>\0"
- "Cc\0Bjorn Helgaas <bhelgaas@google.com>"
-  Rob Herring <robh+dt@kernel.org>
-  devicetree@vger.kernel.org
-  linux-rockchip@lists.infradead.org
-  Brian Norris <briannorris@chromium.org>
- " linux-pci@vger.kernel.org\0"
+ "To\0Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\0"
+ "Cc\0Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>"
+  Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
+  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
+  Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
+ " linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0"
  "\00:1\0"
  "b\0"
  "Am Freitag, 21. Oktober 2016, 10:43:55 CEST schrieb Shawn Lin:\n"
@@ -21,10 +22,10 @@
  "> under MP test internally, so the backward compatibility won't be\n"
  "> a big deal.\n"
  "> \n"
- "> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>\n"
+ "> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n"
  "\n"
  "looks good from my side.\n"
- "Reviewed-by: Heiko Stuebner <heiko@sntech.de>\n"
+ "Reviewed-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\n"
  "\n"
  "As Shawn wrote the soc in question (first one at all with a pcie controller) \n"
  "has not yet found its way into any device, so no existing one can abviously be \n"
@@ -163,6 +164,12 @@
  "> +\n"
  ">  \trockchip->ep_gpio = devm_gpiod_get(dev, \"ep\", GPIOD_OUT_HIGH);\n"
  ">  \tif (IS_ERR(rockchip->ep_gpio)) {\n"
- ">  \t\tdev_err(dev, \"missing ep-gpios property in node\\n\");"
+ ">  \t\tdev_err(dev, \"missing ep-gpios property in node\\n\");\n"
+ "\n"
+ "\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-56170b61dc27cf2d856c20952362d001e3bedc1ff450fd4bb9d868fadf6d40fa
+502805cbad4e5cdfd230ffcfb19c4f731d7325ce63a3a7f852cc66bbfbb87d77

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