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charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.3 (3.52.3-1.fc40app2) MIME-Version: 1.0 On Mon, 2024-07-22 at 14:42 +0200, Jan Beulich wrote: > On 12.07.2024 18:22, Oleksii Kurochko wrote: > > --- a/xen/arch/riscv/include/asm/config.h > > +++ b/xen/arch/riscv/include/asm/config.h > > @@ -74,11 +74,20 @@ > > =C2=A0#error "unsupported RV_STAGE1_MODE" > > =C2=A0#endif > > =C2=A0 > > +#define XEN_SIZE=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 MB(2) > > +#define XEN_VIRT_END=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 (XEN_VIRT_START + XEN_SIZE) > > + > > +#define BOOT_FDT_VIRT_START=C2=A0=C2=A0=C2=A0=C2=A0 XEN_VIRT_END > > +#define BOOT_FDT_VIRT_SIZE=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 MB(4) > > + > > =C2=A0#define DIRECTMAP_SLOT_END=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 509 > > =C2=A0#define DIRECTMAP_SLOT_START=C2=A0=C2=A0=C2=A0 200 > > =C2=A0#define DIRECTMAP_VIRT_START=C2=A0=C2=A0=C2=A0 SLOTN(DIRECTMAP_SL= OT_START) > > =C2=A0#define DIRECTMAP_SIZE=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 (SLOTN(DIRECTMAP_SLOT_END) - > > SLOTN(DIRECTMAP_SLOT_START)) > > =C2=A0 > > +#define FIXMAP_BASE=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 (BOOT_FDT_VIRT_START + > > BOOT_FDT_VIRT_SIZE) > > +#define FIXMAP_ADDR(n)=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 (FIXMAP_BASE + (n) * PAGE_SIZE) >=20 > Why exactly do you insert this here, and not adjacent to > BOOT_FDT_VIRT_*, > which it actually is adjacent with? I tried to follow alphabetical order. > Then ... >=20 > > =C2=A0#define FRAMETABLE_SCALE_FACTOR=C2=A0 (PAGE_SIZE/sizeof(struct > > page_info)) > > =C2=A0#define FRAMETABLE_SIZE_IN_SLOTS (((DIRECTMAP_SIZE / SLOTN(1)) / > > FRAMETABLE_SCALE_FACTOR) + 1) >=20 > ... this would also stay next to DIRECTMAP_*, which it uses. >=20 > > --- a/xen/arch/riscv/include/asm/page.h > > +++ b/xen/arch/riscv/include/asm/page.h > > @@ -81,6 +81,13 @@ static inline void flush_page_to_ram(unsigned > > long mfn, bool sync_icache) > > =C2=A0=C2=A0=C2=A0=C2=A0 BUG_ON("unimplemented"); > > =C2=A0} > > =C2=A0 > > +/* Write a pagetable entry. */ > > +static inline void write_pte(pte_t *p, pte_t pte) > > +{ > > +=C2=A0=C2=A0=C2=A0 *p =3D pte; > > +=C2=A0=C2=A0=C2=A0 asm volatile ("sfence.vma"); >=20 > When they don't have operands, asm()-s are volatile anyway (being > explicit > about this may still be desirable, yes). But: Can you get away > without > operands here? Don't you need a memory clobber for the fence to > actually > remain where it is needed? It should be "::memory" here. Thanks. >=20 > Also, nit (style): Blanks missing. >=20 > > --- a/xen/arch/riscv/mm.c > > +++ b/xen/arch/riscv/mm.c > > @@ -49,6 +49,9 @@ stage1_pgtbl_root[PAGETABLE_ENTRIES]; > > =C2=A0pte_t __section(".bss.page_aligned") __aligned(PAGE_SIZE) > > =C2=A0stage1_pgtbl_nonroot[PGTBL_INITIAL_COUNT * PAGETABLE_ENTRIES]; > > =C2=A0 > > +pte_t __section(".bss.page_aligned") __aligned(PAGE_SIZE) > > +xen_fixmap[PAGETABLE_ENTRIES]; >=20 > Any reason this cannot be static? It will be used by pmap: static inline void arch_pmap_map(unsigned int slot, mfn_t mfn) { pte_t *entry =3D &xen_fixmap[slot]; pte_t pte; =20 ASSERT(!pte_is_valid(*entry)); =20 pte =3D mfn_to_xen_entry(mfn, PAGE_HYPERVISOR_RW); pte.pte |=3D PTE_LEAF_DEFAULT; write_pte(entry, pte); } =20 static inline void arch_pmap_unmap(unsigned int slot) { pte_t pte =3D {}; =20 write_pte(&xen_fixmap[slot], pte); } ~ Oleksii