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bh=ArIBkWypTrCrcUcT7JGOxsY7XolsZfaVO9t9RQk02vU=; b=hsl44DSdPQNC6o/1Ayg+upM8dpedh2TJVs6J5jbNFxtT/r0sDbp2hE1vA+6UDrC/nrdBgWlHV415/CEDfksXdsBY6AznK7l+WV/VrPUqFvqFE0mj0Gvbevl26raxWptRnr5tVjjCMS8EQewlJ5UcUvIyo+Sg0oKP6s/MGPnBi54= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: <26c0b60f-053a-4b01-8b74-2cec0d72b389@amd.com> Date: Tue, 18 Aug 2026 08:28:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/4] xen/arm: add i.MX8M platform and UART support To: Wig Cheng , CC: Stefano Stabellini , Julien Grall , Bertrand Marquis , "Volodymyr Babchuk" , John Ernberg , Peng Fan References: <20260818025224.4165503-1-onlywig@gmail.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260818025224.4165503-1-onlywig@gmail.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: pybFiMBvV0g4pktASm8KXdXid2c3Jo2O+z3WisaKF1ci0YdPpg+tdx0oMCmRRtEWbXnHI8bNeGUM391YbNXiLaSriatYC4Y3Y9snan3YmFGREc/Pl+HlPmRdbFWWkhZ26PyueK/lgGjYQm4fXBdfR7ux02MUXj73Wc889g/DrVVMVcFQUFd40O5gH6jE0ECSM8HitU/oIfRhx3gi12wm37lbj5zKTJNZT30TCXV6NxQzVBghN4QZ6ZQETjUq0BZi3gJcw51LXudPPUxHsrukhX3f8w2Wfo6xPp3jPKISAU0zdeHbMl0OXEiqHDaIKsjJITpW+fPcSgSF94YT6gLgpDxTrdZtml2y136Rxr4YxdNeY1pOT7ZJOSWqr1DgcBsGtuX6S7bmVKHgETDCjXkfF7lq5Ib2NlvTmH5d+dYM95QeyfaGO47jVL/RWg8Kx94U X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Aug 2026 06:28:40.9209 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0956c3ef-934c-4cd8-707d-08defcf1f1f1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A8.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR12MB9627 X-purgate-ID: tlsNG-c1860d/1787034526-D6B4187B-52DE3A5A/0/0 X-purgate-type: clean X-purgate-size: 3457 On 18-Aug-26 04:52, Wig Cheng wrote: > Following Michal Orzel's review of v1, this series adds Xen support for > the NXP i.MX8M family (i.MX8MP / MQ / MM / MN). It provides the console > UART driver, its early printk, the platform glue (SiP SMC whitelist for > the calls the dom0 kernel issues to TF-A), and a MAINTAINERS entry. > > Tested on i.MX8MP (4x Cortex-A53, GICv3) with the vendor kernel 6.18: > dom0 boots to login on the hypervisor console, and a domU starts with a > PV disk and virtio devices running a full Wayland distro. > > Notes for reviewers: > > - Unlike i.MX8MQ, the i.MX8MP device tree uses the GIC as the root > interrupt controller (interrupt-parent = <&gic>), so no device-tree > workaround is needed and power domains keep working. > > - The i.MX8M family has no SMMU, so device passthrough relies on the > 1:1 direct-mapped hardware domain. > > - The SiP SMC whitelist forwards only the specific subfunctions the > dom0 kernel issues, extracted from the vendor kernel call sites. > DDR DVFS is left at service level because its reg1 is a frequency > setpoint rather than a fixed subfunction id. No call was denied at > runtime. > > Changes since v1: > > Patch 1 (UART driver): > - Documentation narrowed to the i.MX8M family (dropped i.MX6/7). > - Relicensed the new files as GPL-2.0-only. > - Dropped the stale file-path lines from the file headers. > - Renamed the header guard to ASM_IMX_UART_H. > - Removed unused register/bit macros; header is now asm-safe (BIT(n, U)). > - Also clear UCR1_TXMPTYEN on init; documented that the console is > driven entirely through UCR1. For the future, please include the changeset in the individual patches. This way it's easier for us to review without having to switch between e-mails. ~Michal > > Patch 2 (early printk): > - bne -> b.ne. > > Patch 3 (platform): > - Build the SiP function IDs with ARM_SMCCC_CALL_VAL (IMX_SIP_FID), > matching the i.MX8QM platform. > - Whitelist per subfunction (GPC, SRC, NoC) instead of whole services; > DDR DVFS and SoC info kept at service level with a comment on why. > - Dropped the BBSM call, which is not issued on i.MX8M. > - Fixed the misleading "secure RTC" comment and a stray space. > > Patch 4 (new): > - MAINTAINERS entry, as a separate patch. > > v1: https://lore.kernel.org/xen-devel/20260814162535.331459-1-onlywig@gmail.com/ > > > Wig Cheng (4): > xen/char: add classic i.MX UART driver > xen/arm64: add early printk for the classic i.MX UART > xen/arm: add i.MX8M platform support > MAINTAINERS: add myself as reviewer of i.MX8M related patches > > MAINTAINERS | 7 + > xen/arch/arm/Kconfig.debug | 12 ++ > xen/arch/arm/arm64/debug-imx-uart.inc | 37 +++++ > xen/arch/arm/include/asm/imx-uart.h | 57 +++++++ > xen/arch/arm/platforms/Makefile | 1 + > xen/arch/arm/platforms/imx8m.c | 152 +++++++++++++++++ > xen/drivers/char/Kconfig | 8 + > xen/drivers/char/Makefile | 1 + > xen/drivers/char/imx-uart.c | 226 ++++++++++++++++++++++++++ > 9 files changed, 501 insertions(+) > create mode 100644 xen/arch/arm/arm64/debug-imx-uart.inc > create mode 100644 xen/arch/arm/include/asm/imx-uart.h > create mode 100644 xen/arch/arm/platforms/imx8m.c > create mode 100644 xen/drivers/char/imx-uart.c >