diff for duplicates of <2729097.X0eAsuYF97@amdc1032> diff --git a/a/1.txt b/N1/1.txt index 4c2bae5..554b4f6 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -59,18 +59,18 @@ Index: b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt +Example for Exynos5440 compatible power domains: + -+ power-domains@00160000 { ++ power-domains at 00160000 { + compatible = "samsung,exynos5440-power-domains", "simple-bus"; + reg = <0x00160000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + -+ pd_pcie: pcie-power-domain@6 { ++ pd_pcie: pcie-power-domain at 6 { + compatible = "samsung,exynos5440-pd"; + reg = <6>; + }; + -+ pd_conn2: conn2-power-domain@7 { ++ pd_conn2: conn2-power-domain at 7 { + compatible = "samsung,exynos5440-pd"; + reg = <7>; + }; @@ -87,24 +87,24 @@ Index: b/arch/arm/boot/dts/exynos5440.dtsi #clock-cells = <1>; }; -+ power-domains@00160000 { ++ power-domains at 00160000 { + compatible = "samsung,exynos5440-power-domains", "simple-bus"; + reg = <0x00160000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + -+ pd_pcie: pcie-power-domain@6 { ++ pd_pcie: pcie-power-domain at 6 { + compatible = "samsung,exynos5440-pd"; + reg = <6>; + }; + -+ pd_conn2: conn2-power-domain@7 { ++ pd_conn2: conn2-power-domain at 7 { + compatible = "samsung,exynos5440-pd"; + reg = <7>; + }; + }; + - gic:interrupt-controller@2E0000 { + gic:interrupt-controller at 2E0000 { compatible = "arm,cortex-a15-gic"; #interrupt-cells = <3>; @@ -192,6 +209,7 @@ @@ -122,7 +122,7 @@ Index: b/arch/arm/boot/dts/exynos5440.dtsi + samsung,power-domain = <&pd_conn2>; }; - ohci@220000 { + ohci at 220000 { @@ -248,6 +267,7 @@ interrupts = <0 29 0>; clocks = <&clock 24>; @@ -130,7 +130,7 @@ Index: b/arch/arm/boot/dts/exynos5440.dtsi + samsung,power-domain = <&pd_conn2>; }; - ehci@221000 { + ehci at 221000 { @@ -256,6 +276,7 @@ interrupts = <0 29 0>; clocks = <&clock 24>; @@ -138,7 +138,7 @@ Index: b/arch/arm/boot/dts/exynos5440.dtsi + samsung,power-domain = <&pd_conn2>; }; - pcie@290000 { + pcie at 290000 { @@ -275,6 +296,7 @@ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; @@ -146,7 +146,7 @@ Index: b/arch/arm/boot/dts/exynos5440.dtsi + samsung,power-domain = <&pd_pcie>; }; - pcie@2a0000 { + pcie at 2a0000 { @@ -294,5 +316,6 @@ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; diff --git a/a/content_digest b/N1/content_digest index 889f10a..4078248 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,14 +1,7 @@ - "From\0Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>\0" + "From\0b.zolnierkie@samsung.com (Bartlomiej Zolnierkiewicz)\0" "Subject\0[PATCH] ARM: EXYNOS: add power domains support for EXYNOS5440\0" "Date\0Fri, 02 Aug 2013 15:23:19 +0200\0" - "To\0Kukjin Kim <kgene.kim@samsung.com>\0" - "Cc\0Myungjoo Ham <myungjoo.ham@samsung.com>" - Tomasz Figa <t.figa@samsung.com> - Stephen Warren <swarren@wwwdotorg.org> - linux-samsung-soc@vger.kernel.org - linux-arm-kernel@lists.infradead.org - linux-pm@vger.kernel.org - " devicetree@vger.kernel.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On EXYNOS5440 power domains are handled in a different way than on\n" @@ -72,18 +65,18 @@ " \n" "+Example for Exynos5440 compatible power domains:\n" "+\n" - "+\tpower-domains@00160000 {\n" + "+\tpower-domains at 00160000 {\n" "+\t\tcompatible = \"samsung,exynos5440-power-domains\", \"simple-bus\";\n" "+\t\treg = <0x00160000 0x1000>;\n" "+\t\t#address-cells = <1>;\n" "+\t\t#size-cells = <0>;\n" "+\n" - "+\t\tpd_pcie: pcie-power-domain@6 {\n" + "+\t\tpd_pcie: pcie-power-domain at 6 {\n" "+\t\t\tcompatible = \"samsung,exynos5440-pd\";\n" "+\t\t\treg = <6>;\n" "+\t\t};\n" "+\n" - "+\t\tpd_conn2: conn2-power-domain@7 {\n" + "+\t\tpd_conn2: conn2-power-domain at 7 {\n" "+\t\t\tcompatible = \"samsung,exynos5440-pd\";\n" "+\t\t\treg = <7>;\n" "+\t\t};\n" @@ -100,24 +93,24 @@ " \t\t#clock-cells = <1>;\n" " \t};\n" " \n" - "+\tpower-domains@00160000 {\n" + "+\tpower-domains at 00160000 {\n" "+\t\tcompatible = \"samsung,exynos5440-power-domains\", \"simple-bus\";\n" "+\t\treg = <0x00160000 0x1000>;\n" "+\t\t#address-cells = <1>;\n" "+\t\t#size-cells = <0>;\n" "+\n" - "+\t\tpd_pcie: pcie-power-domain@6 {\n" + "+\t\tpd_pcie: pcie-power-domain at 6 {\n" "+\t\t\tcompatible = \"samsung,exynos5440-pd\";\n" "+\t\t\treg = <6>;\n" "+\t\t};\n" "+\n" - "+\t\tpd_conn2: conn2-power-domain@7 {\n" + "+\t\tpd_conn2: conn2-power-domain at 7 {\n" "+\t\t\tcompatible = \"samsung,exynos5440-pd\";\n" "+\t\t\treg = <7>;\n" "+\t\t};\n" "+\t};\n" "+\n" - " \tgic:interrupt-controller@2E0000 {\n" + " \tgic:interrupt-controller at 2E0000 {\n" " \t\tcompatible = \"arm,cortex-a15-gic\";\n" " \t\t#interrupt-cells = <3>;\n" "@@ -192,6 +209,7 @@\n" @@ -135,7 +128,7 @@ "+\t\tsamsung,power-domain = <&pd_conn2>;\n" " \t};\n" " \n" - " \tohci@220000 {\n" + " \tohci at 220000 {\n" "@@ -248,6 +267,7 @@\n" " \t\tinterrupts = <0 29 0>;\n" " \t\tclocks = <&clock 24>;\n" @@ -143,7 +136,7 @@ "+\t\tsamsung,power-domain = <&pd_conn2>;\n" " \t};\n" " \n" - " \tehci@221000 {\n" + " \tehci at 221000 {\n" "@@ -256,6 +276,7 @@\n" " \t\tinterrupts = <0 29 0>;\n" " \t\tclocks = <&clock 24>;\n" @@ -151,7 +144,7 @@ "+\t\tsamsung,power-domain = <&pd_conn2>;\n" " \t};\n" " \n" - " \tpcie@290000 {\n" + " \tpcie at 290000 {\n" "@@ -275,6 +296,7 @@\n" " \t\t#interrupt-cells = <1>;\n" " \t\tinterrupt-map-mask = <0 0 0 0>;\n" @@ -159,7 +152,7 @@ "+\t\tsamsung,power-domain = <&pd_pcie>;\n" " \t};\n" " \n" - " \tpcie@2a0000 {\n" + " \tpcie at 2a0000 {\n" "@@ -294,5 +316,6 @@\n" " \t\t#interrupt-cells = <1>;\n" " \t\tinterrupt-map-mask = <0 0 0 0>;\n" @@ -371,4 +364,4 @@ " int __init exynos_pm_late_initcall(void)\n" { -e947c2e7b49e0e862ff9af4aa0c5acf5a3c0577ff2fdb12a745eb7846b78505a +eec6bce498d3931e832a1151a3b30f9d48a94ba6a86bd4123ca29607c59deb78
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.