From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 09/12] drm/i915/gt: Incorporate the virtual engine into timeslicing
Date: Tue, 19 May 2020 10:40:40 +0100 [thread overview]
Message-ID: <275c9727-d92c-4330-d4c7-063137923bf2@linux.intel.com> (raw)
In-Reply-To: <20200519063123.20673-9-chris@chris-wilson.co.uk>
On 19/05/2020 07:31, Chris Wilson wrote:
> It was quite the oversight to only factor in the normal queue to decide
> the timeslicing switch priority. By leaving out the next virtual request
> from the priority decision, we would not timeslice the current engine if
> there was an available virtual request.
>
> Testcase: igt/gem_exec_balancer/sliced
> Fixes: 3df2deed411e ("drm/i915/execlists: Enable timeslice on partial virtual engine dequeue")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 30 +++++++++++++++++++++++------
> 1 file changed, 24 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 35e7ae3c049c..42cb0cae2845 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1898,7 +1898,8 @@ static void defer_active(struct intel_engine_cs *engine)
>
> static bool
> need_timeslice(const struct intel_engine_cs *engine,
> - const struct i915_request *rq)
> + const struct i915_request *rq,
> + const struct rb_node *rb)
> {
> int hint;
>
> @@ -1906,6 +1907,24 @@ need_timeslice(const struct intel_engine_cs *engine,
> return false;
>
> hint = engine->execlists.queue_priority_hint;
> +
> + if (rb) {
> + const struct virtual_engine *ve =
> + rb_entry(rb, typeof(*ve), nodes[engine->id].rb);
> + const struct intel_engine_cs *inflight =
> + intel_context_inflight(&ve->context);
> +
> + if (!inflight || inflight == engine) {
> + struct i915_request *next;
> +
> + rcu_read_lock();
> + next = READ_ONCE(ve->request);
> + if (next)
> + hint = max(hint, rq_prio(next));
> + rcu_read_unlock();
> + }
> + }
> +
> if (!list_is_last(&rq->sched.link, &engine->active.requests))
> hint = max(hint, rq_prio(list_next_entry(rq, sched.link)));
>
> @@ -1980,10 +1999,9 @@ static void set_timeslice(struct intel_engine_cs *engine)
> set_timer_ms(&engine->execlists.timer, duration);
> }
>
> -static void start_timeslice(struct intel_engine_cs *engine)
> +static void start_timeslice(struct intel_engine_cs *engine, int prio)
> {
> struct intel_engine_execlists *execlists = &engine->execlists;
> - const int prio = queue_prio(execlists);
> unsigned long duration;
>
> if (!intel_engine_has_timeslices(engine))
> @@ -2143,7 +2161,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
> __unwind_incomplete_requests(engine);
>
> last = NULL;
> - } else if (need_timeslice(engine, last) &&
> + } else if (need_timeslice(engine, last, rb) &&
> timeslice_expired(execlists, last)) {
> if (i915_request_completed(last)) {
> tasklet_hi_schedule(&execlists->tasklet);
> @@ -2191,7 +2209,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
> * Even if ELSP[1] is occupied and not worthy
> * of timeslices, our queue might be.
> */
> - start_timeslice(engine);
> + start_timeslice(engine, queue_prio(execlists));
> return;
> }
> }
> @@ -2226,7 +2244,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
>
> if (last && !can_merge_rq(last, rq)) {
> spin_unlock(&ve->base.active.lock);
> - start_timeslice(engine);
> + start_timeslice(engine, rq_prio(rq));
> return; /* leave this for another sibling */
> }
>
>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
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next prev parent reply other threads:[~2020-05-19 9:40 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-19 6:31 [Intel-gfx] [PATCH 01/12] drm/i915: Don't set queue-priority hint when supressing the reschedule Chris Wilson
2020-05-19 6:31 ` [Intel-gfx] [PATCH 02/12] drm/i915/selftests: Change priority overflow detection Chris Wilson
2020-05-19 13:58 ` Mika Kuoppala
2020-05-19 6:31 ` [Intel-gfx] [PATCH 03/12] drm/i915/selftests: Restore to default heartbeat Chris Wilson
2020-05-19 13:41 ` Mika Kuoppala
2020-05-19 6:31 ` [Intel-gfx] [PATCH 04/12] drm/i915/selftests: Check for an initial-breadcrumb in wait_for_submit() Chris Wilson
2020-05-19 14:20 ` Mika Kuoppala
2020-05-19 6:31 ` [Intel-gfx] [PATCH 05/12] drm/i915/execlists: Shortcircuit queue_prio() for no internal levels Chris Wilson
2020-05-19 6:31 ` [Intel-gfx] [PATCH 06/12] drm/i915: Move saturated workload detection back to the context Chris Wilson
2020-05-19 6:31 ` [Intel-gfx] [PATCH 07/12] drm/i915/selftests: Add tests for timeslicing virtual engines Chris Wilson
2020-05-19 9:39 ` Tvrtko Ursulin
2020-05-19 6:31 ` [Intel-gfx] [PATCH 08/12] drm/i915/gt: Kick virtual siblings on timeslice out Chris Wilson
2020-05-19 6:31 ` [Intel-gfx] [PATCH 09/12] drm/i915/gt: Incorporate the virtual engine into timeslicing Chris Wilson
2020-05-19 9:40 ` Tvrtko Ursulin [this message]
2020-05-19 6:31 ` [Intel-gfx] [PATCH 10/12] drm/i915/gt: Use virtual_engine during execlists_dequeue Chris Wilson
2020-05-19 6:31 ` [Intel-gfx] [PATCH 11/12] drm/i915/gt: Decouple inflight virtual engines Chris Wilson
2020-05-19 6:31 ` [Intel-gfx] [PATCH 12/12] drm/i915/gt: Resubmit the virtual engine on schedule-out Chris Wilson
2020-05-19 7:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/12] drm/i915: Don't set queue-priority hint when supressing the reschedule Patchwork
2020-05-19 7:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-05-19 7:40 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-05-19 9:21 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-05-19 13:38 ` [Intel-gfx] [PATCH 01/12] " Mika Kuoppala
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