From: Matthias Brugger <mbrugger@suse.com>
To: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>,
Chester Lin <chester62515@gmail.com>,
Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>,
linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
NXP S32 Linux Team <s32@nxp.com>,
Radu Pirea <radu-nicolae.pirea@nxp.com>
Subject: Re: [PATCH v2 1/2] arm64: dts: s32g: Add S32G2/S32G3 uSDHC pinmux
Date: Fri, 6 Sep 2024 17:53:28 +0200 [thread overview]
Message-ID: <276a7f04-6761-40c2-8f37-799175f9b11b@suse.com> (raw)
In-Reply-To: <20240830113347.4048370-2-ciprianmarian.costea@oss.nxp.com>
On 30/08/2024 13:33, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>
> Adding 100mhz & 200mhz pinmux support for uSDHC helps to enable
> higher speed modes for SD (SDR50, DDR50, SDR104) and
> eMMC (such as HS200, HS400/HS400ES).
>
> Signed-off-by: Radu Pirea <radu-nicolae.pirea@nxp.com>
> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
> ---
> arch/arm64/boot/dts/freescale/s32g2.dtsi | 153 ++++++++++++++++++
> .../arm64/boot/dts/freescale/s32g274a-evb.dts | 4 +
> .../boot/dts/freescale/s32g274a-rdb2.dts | 4 +
> arch/arm64/boot/dts/freescale/s32g3.dtsi | 153 ++++++++++++++++++
> .../boot/dts/freescale/s32g399a-rdb3.dts | 4 +
> 5 files changed, 318 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index fa054bfe7d5c..7be430b78c83 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> @@ -162,6 +162,159 @@ jtag-grp4 {
> slew-rate = <166>;
> };
> };
> +
> + pinctrl_usdhc0: usdhc0grp-pins {
> + usdhc0-grp0 {
> + pinmux = <0x2e1>,
> + <0x381>;
> + output-enable;
> + bias-pull-down;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-grp1 {
> + pinmux = <0x2f1>,
> + <0x301>,
> + <0x311>,
> + <0x321>,
> + <0x331>,
> + <0x341>,
> + <0x351>,
> + <0x361>,
> + <0x371>;
> + output-enable;
> + input-enable;
> + bias-pull-up;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-grp2 {
> + pinmux = <0x391>;
> + output-enable;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-grp3 {
> + pinmux = <0x3a0>;
> + input-enable;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-grp4 {
> + pinmux = <0x2032>,
> + <0x2042>,
> + <0x2052>,
> + <0x2062>,
> + <0x2072>,
> + <0x2082>,
> + <0x2092>,
> + <0x20a2>,
> + <0x20b2>,
> + <0x20c2>;
> + };
> + };
> +
> + pinctrl_usdhc0_100mhz: usdhc0-100mhzgrp-pins {
> + usdhc0-100mhz-grp0 {
> + pinmux = <0x2e1>,
> + <0x381>;
> + output-enable;
> + bias-pull-down;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-100mhz-grp1 {
> + pinmux = <0x2f1>,
> + <0x301>,
> + <0x311>,
> + <0x321>,
> + <0x331>,
> + <0x341>,
> + <0x351>,
> + <0x361>,
> + <0x371>;
> + output-enable;
> + input-enable;
> + bias-pull-up;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-100mhz-grp2 {
> + pinmux = <0x391>;
> + output-enable;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-100mhz-grp3 {
> + pinmux = <0x3a0>;
> + input-enable;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-100mhz-grp4 {
> + pinmux = <0x2032>,
> + <0x2042>,
> + <0x2052>,
> + <0x2062>,
> + <0x2072>,
> + <0x2082>,
> + <0x2092>,
> + <0x20a2>,
> + <0x20b2>,
> + <0x20c2>;
> + };
> + };
> +
> + pinctrl_usdhc0_200mhz: usdhc0-200mhzgrp-pins {
> + usdhc0-200mhz-grp0 {
> + pinmux = <0x2e1>,
> + <0x381>;
> + output-enable;
> + bias-pull-down;
> + slew-rate = <208>;
> + };
> +
> + usdhc0-200mhz-grp1 {
> + pinmux = <0x2f1>,
> + <0x301>,
> + <0x311>,
> + <0x321>,
> + <0x331>,
> + <0x341>,
> + <0x351>,
> + <0x361>,
> + <0x371>;
> + output-enable;
> + input-enable;
> + bias-pull-up;
> + slew-rate = <208>;
> + };
> +
> + usdhc0-200mhz-grp2 {
> + pinmux = <0x391>;
> + output-enable;
> + slew-rate = <208>;
> + };
> +
> + usdhc0-200mhz-grp3 {
> + pinmux = <0x3a0>;
> + input-enable;
> + slew-rate = <208>;
> + };
> +
> + usdhc0-200mhz-grp4 {
> + pinmux = <0x2032>,
> + <0x2042>,
> + <0x2052>,
> + <0x2062>,
> + <0x2072>,
> + <0x2082>,
> + <0x2092>,
> + <0x20a2>,
> + <0x20b2>,
> + <0x20c2>;
> + };
> + };
> };
>
> uart0: serial@401c8000 {
> diff --git a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
> index dbe498798bd9..7ab917f547ef 100644
> --- a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
> +++ b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
> @@ -34,6 +34,10 @@ &uart0 {
> };
>
> &usdhc0 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc0>;
> + pinctrl-1 = <&pinctrl_usdhc0_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc0_200mhz>;
> disable-wp;
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
> index ab1e5caaeae7..8739f63771bc 100644
> --- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
> +++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
> @@ -40,6 +40,10 @@ &uart1 {
> };
>
> &usdhc0 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc0>;
> + pinctrl-1 = <&pinctrl_usdhc0_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc0_200mhz>;
> disable-wp;
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> index b4226a9143c8..6c572ffe37ca 100644
> --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> @@ -219,6 +219,159 @@ jtag-grp4 {
> slew-rate = <166>;
> };
> };
> +
> + pinctrl_usdhc0: usdhc0grp-pins {
> + usdhc0-grp0 {
> + pinmux = <0x2e1>,
> + <0x381>;
> + output-enable;
> + bias-pull-down;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-grp1 {
> + pinmux = <0x2f1>,
> + <0x301>,
> + <0x311>,
> + <0x321>,
> + <0x331>,
> + <0x341>,
> + <0x351>,
> + <0x361>,
> + <0x371>;
> + output-enable;
> + input-enable;
> + bias-pull-up;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-grp2 {
> + pinmux = <0x391>;
> + output-enable;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-grp3 {
> + pinmux = <0x3a0>;
> + input-enable;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-grp4 {
> + pinmux = <0x2032>,
> + <0x2042>,
> + <0x2052>,
> + <0x2062>,
> + <0x2072>,
> + <0x2082>,
> + <0x2092>,
> + <0x20a2>,
> + <0x20b2>,
> + <0x20c2>;
> + };
> + };
> +
> + pinctrl_usdhc0_100mhz: usdhc0-100mhzgrp-pins {
> + usdhc0-100mhz-grp0 {
> + pinmux = <0x2e1>,
> + <0x381>;
> + output-enable;
> + bias-pull-down;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-100mhz-grp1 {
> + pinmux = <0x2f1>,
> + <0x301>,
> + <0x311>,
> + <0x321>,
> + <0x331>,
> + <0x341>,
> + <0x351>,
> + <0x361>,
> + <0x371>;
> + output-enable;
> + input-enable;
> + bias-pull-up;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-100mhz-grp2 {
> + pinmux = <0x391>;
> + output-enable;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-100mhz-grp3 {
> + pinmux = <0x3a0>;
> + input-enable;
> + slew-rate = <150>;
> + };
> +
> + usdhc0-100mhz-grp4 {
> + pinmux = <0x2032>,
> + <0x2042>,
> + <0x2052>,
> + <0x2062>,
> + <0x2072>,
> + <0x2082>,
> + <0x2092>,
> + <0x20a2>,
> + <0x20b2>,
> + <0x20c2>;
> + };
> + };
> +
> + pinctrl_usdhc0_200mhz: usdhc0-200mhzgrp-pins {
> + usdhc0-200mhz-grp0 {
> + pinmux = <0x2e1>,
> + <0x381>;
> + output-enable;
> + bias-pull-down;
> + slew-rate = <208>;
> + };
> +
> + usdhc0-200mhz-grp1 {
> + pinmux = <0x2f1>,
> + <0x301>,
> + <0x311>,
> + <0x321>,
> + <0x331>,
> + <0x341>,
> + <0x351>,
> + <0x361>,
> + <0x371>;
> + output-enable;
> + input-enable;
> + bias-pull-up;
> + slew-rate = <208>;
> + };
> +
> + usdhc0-200mhz-grp2 {
> + pinmux = <0x391>;
> + output-enable;
> + slew-rate = <208>;
> + };
> +
> + usdhc0-200mhz-grp3 {
> + pinmux = <0x3a0>;
> + input-enable;
> + slew-rate = <208>;
> + };
> +
> + usdhc0-200mhz-grp4 {
> + pinmux = <0x2032>,
> + <0x2042>,
> + <0x2052>,
> + <0x2062>,
> + <0x2072>,
> + <0x2082>,
> + <0x2092>,
> + <0x20a2>,
> + <0x20b2>,
> + <0x20c2>;
> + };
> + };
> };
>
> uart0: serial@401c8000 {
> diff --git a/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts b/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts
> index 176e5af191c8..828e353455b5 100644
> --- a/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts
> +++ b/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts
> @@ -40,6 +40,10 @@ &uart1 {
> };
>
> &usdhc0 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc0>;
> + pinctrl-1 = <&pinctrl_usdhc0_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc0_200mhz>;
> bus-width = <8>;
> disable-wp;
> status = "okay";
next prev parent reply other threads:[~2024-09-06 15:53 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-30 11:33 [PATCH v2 0/2] add S32G2/S32G3 uSDHC pinmux Ciprian Costea
2024-08-30 11:33 ` [PATCH v2 1/2] arm64: dts: s32g: Add " Ciprian Costea
2024-09-06 15:53 ` Matthias Brugger [this message]
2024-09-17 17:44 ` Krzysztof Kozlowski
2024-09-18 9:58 ` Ciprian Marian Costea
2024-08-30 11:33 ` [PATCH v2 2/2] arm64: dts: s32g2: Disable support for SD/eMMC UHS mode Ciprian Costea
2024-09-06 15:53 ` Matthias Brugger
2024-10-08 9:25 ` [PATCH v2 0/2] add S32G2/S32G3 uSDHC pinmux Shawn Guo
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