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[2001:4c4e:24ed:fa00:ace5:6db4:a62d:1e35]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-490ea94f5b0sm26960095e9.1.2026.06.11.23.18.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jun 2026 23:18:42 -0700 (PDT) From: Timur =?UTF-8?B?S3Jpc3TDs2Y=?= To: natalie.vock@gmx.de, honghuan@amd.com, Alexander.Deucher@amd.com, Felix.Kuehling@amd.com, Philip.Yang@amd.com, christian.koenig@amd.com Cc: amd-gfx@lists.freedesktop.org Subject: Re: [PATCH 03/13] drm/amdgpu: add gfp_flags to amdgpu_sa_manager Date: Fri, 12 Jun 2026 08:18:41 +0200 Message-ID: <2787510.lGaqSPkdTl@timur-max> In-Reply-To: <20260529114031.3714-4-christian.koenig@amd.com> References: <20260529114031.3714-1-christian.koenig@amd.com> <20260529114031.3714-4-christian.koenig@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On 2026. m=C3=A1jus 29., p=C3=A9ntek 13:24:05 k=C3=B6z=C3=A9p-eur=C3=B3pai = ny=C3=A1ri id=C5=91 Christian K=C3=B6nig=20 wrote: > Make sure that we use the emmergency reserves for unrecoverable page > faults and GPU resets. >=20 > Signed-off-by: Christian K=C3=B6nig > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 23 ++++++++++++++++++++--- > drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c | 18 ++++++++++++------ > drivers/gpu/drm/amd/amdgpu/amdgpu_sa.h | 3 ++- > 3 files changed, 34 insertions(+), 10 deletions(-) >=20 > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c index 334f95f8f339..60e4c3985029 > 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c > @@ -356,16 +356,33 @@ int amdgpu_ib_pool_init(struct amdgpu_device *adev) > [AMDGPU_IB_POOL_IMMEDIATE] =3D SZ_128K, > [AMDGPU_IB_POOL_DIRECT] =3D SZ_512K > }; > + const gfp_t gfp_flags[AMDGPU_IB_POOL_MAX] =3D { > + /* > + * For normal page table updates and recoverable page=20 faults, > + * further restricted by the VM eviction lock to not=20 wait for > + * memory reclaim. > + */ > + [AMDGPU_IB_POOL_DELAYED] =3D GFP_KERNEL, > + /* > + * For redirecting unrecoverable page faults to the=20 dummy page > + * or set the PRT bits. dma_fence submissions might=20 depend on > + * that so we need the emmergency resewrves. > + */ > + [AMDGPU_IB_POOL_IMMEDIATE] =3D GFP_ATOMIC, I know that "retry faults" and "recoverable faults" are different, but both= of=20 these faults can be mitigated, so using the term "unrecoverable" here feels= =20 somewhat confusing to me. Can you please clarify the comment above as well as the commit message that= =20 this is referring to retry faults? > + /* > + * For IB tests during GPU resets. Only very small and=20 temporary > + * allocation to make allow dma_fences to signal. > + */ > + [AMDGPU_IB_POOL_DIRECT] =3D GFP_ATOMIC Just a small grammatical nitpick but "make" is not necessary in this commen= t. > + }; > int r, i; >=20 > if (adev->ib_pool_ready) > return 0; >=20 > - Looks like this is just removing the spurious newline from the previous=20 commit. With that fixed and the comments + commit message clarified: Reviewed-by: Timur Krist=C3=B3f > for (i =3D 0; i < AMDGPU_IB_POOL_MAX; i++) { > r =3D amdgpu_sa_bo_manager_init(adev, &adev->ib_pools[i], > - sizes[i], 256, > - =20 AMDGPU_GEM_DOMAIN_GTT); > + sizes[i],=20 gfp_flags[i]); > if (r) > goto error; > } > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c index 39070b2a4c04..74124f80601e > 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c > @@ -46,11 +46,13 @@ >=20 > int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev, > struct amdgpu_sa_manager *sa_manager, > - unsigned int size, u32 suballoc_align,=20 u32 domain) > + unsigned int size, gfp_t gfp_flags) > { > int r; >=20 > - r =3D amdgpu_bo_create_kernel(adev, size, AMDGPU_GPU_PAGE_SIZE,=20 domain, > + sa_manager->gfp_flags =3D gfp_flags; > + r =3D amdgpu_bo_create_kernel(adev, size, AMDGPU_GPU_PAGE_SIZE, > + AMDGPU_GEM_DOMAIN_GTT, > &sa_manager->bo, &sa_manager- >gpu_addr, > &sa_manager->cpu_ptr); > if (r) { > @@ -59,7 +61,8 @@ int amdgpu_sa_bo_manager_init(struct amdgpu_device *ade= v, > } >=20 > memset(sa_manager->cpu_ptr, 0, size); > - drm_suballoc_manager_init(&sa_manager->base, size,=20 suballoc_align); > + drm_suballoc_manager_init(&sa_manager->base, size, 256); > + > return r; > } >=20 > @@ -73,7 +76,8 @@ void amdgpu_sa_bo_manager_fini(struct amdgpu_device *ad= ev, >=20 > drm_suballoc_manager_fini(&sa_manager->base); >=20 > - amdgpu_bo_free_kernel(&sa_manager->bo, &sa_manager->gpu_addr, > &sa_manager->cpu_ptr); + amdgpu_bo_free_kernel(&sa_manager->bo, > &sa_manager->gpu_addr, > + &sa_manager->cpu_ptr); > } >=20 > int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager, > @@ -81,7 +85,8 @@ int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manag= er, > unsigned int size) > { > struct drm_suballoc *sa =3D drm_suballoc_new(&sa_manager->base,=20 size, > - =20 GFP_KERNEL, false, 0); > + =20 sa_manager->gfp_flags, > + false,=20 0); >=20 > if (IS_ERR(sa)) { > *sa_bo =3D NULL; > @@ -110,6 +115,7 @@ void amdgpu_sa_bo_dump_debug_info(struct > amdgpu_sa_manager *sa_manager, { > struct drm_printer p =3D drm_seq_file_printer(m); >=20 > - drm_suballoc_dump_debug_info(&sa_manager->base, &p, sa_manager- >gpu_addr); > + drm_suballoc_dump_debug_info(&sa_manager->base, &p, > + sa_manager->gpu_addr); > } > #endif > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.h index 8c85c80fc119..1d1c89348709 > 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.h > @@ -35,6 +35,7 @@ struct amdgpu_sa_manager { > struct amdgpu_bo *bo; > uint64_t gpu_addr; > void *cpu_ptr; > + gfp_t gfp_flags; > }; >=20 > static inline struct amdgpu_sa_manager * > @@ -57,7 +58,7 @@ static inline void *amdgpu_sa_bo_cpu_addr(struct > drm_suballoc *sa_bo) >=20 > int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev, > struct amdgpu_sa_manager *sa_manager, > - unsigned size, u32 align, u32 domain); > + unsigned size, gfp_t gfp_flags); > void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev, > struct amdgpu_sa_manager=20 *sa_manager); > int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev,