From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from perceval.ideasonboard.com ([213.167.242.64]:49234 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729195AbeKXDay (ORCPT ); Fri, 23 Nov 2018 22:30:54 -0500 From: Laurent Pinchart To: kieran.bingham@ideasonboard.com Cc: Laurent Pinchart , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org Subject: Re: [PATCH] drm: rcar-du: dw-hdmi: Reject modes with a too high clock frequency Date: Fri, 23 Nov 2018 18:46:14 +0200 Message-ID: <2788457.YuS02OmuOc@avalon> In-Reply-To: <7366b1db-0123-6ed4-9b05-7d7c0aeef303@ideasonboard.com> References: <20181123143459.13133-1-laurent.pinchart+renesas@ideasonboard.com> <2327045.9znzjyYO5t@avalon> <7366b1db-0123-6ed4-9b05-7d7c0aeef303@ideasonboard.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: Hi Kieran, On Friday, 23 November 2018 17:30:43 EET Kieran Bingham wrote: > On 23/11/2018 14:47, Laurent Pinchart wrote: > > On Friday, 23 November 2018 16:43:28 EET Kieran Bingham wrote: > >> On 23/11/2018 14:34, Laurent Pinchart wrote: > >>> Implement a .mode_valid() handler in the R-Car glue layer to reject > >>> modes with an unsupported clock frequency. > >>> > >>> Signed-off-by: Laurent Pinchart > >>> > >>> --- > >>> > >>> drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c | 11 +++++++++++ > >>> 1 file changed, 11 insertions(+) > >>> > >>> diff --git a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c > >>> b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c index > >>> 75490a3e0a2a..8a603235f22d > >>> 100644 > >>> --- a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c > >>> +++ b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c > >>> @@ -35,6 +35,16 @@ static const struct rcar_hdmi_phy_params > >>> rcar_hdmi_phy_params[] = { > >>> { ~0UL, 0x0000, 0x0000, 0x0000 }, > >>> }; > >>> > >>> +static enum drm_mode_status > >>> +rcar_hdmi_mode_valid(struct drm_connector *connector, > >>> + const struct drm_display_mode *mode) > >>> +{ > >>> + if (mode->clock > 297000) > >> > >> Is 29700 constant? Can it be determined from any other location or is it > >> just a magically known platform value? > > > > It's the last entry of the rcar_hdmi_phy_params table above. I considered > > writing it > > > > if (mode->clock > > > > > rcar_hdmi_phy_params[ARRAY_SIZE(rcar_hdmi_phy_params)-2].mpixelclock) > > > > but found it a but hard to parse. Do you think it would be better ? > > Well - for readability - no, > > But for accuracy - yes: > > 297000000 != 297000 > > Unless the /1000 is intentional? I would have had to write / 1000 indeed :-) mode->clock is expressed in kHz. > How about keep the (corrected?) constant value, but add a comment > referencing it's extraction. Good idea, I'll do so. > I don't think the coded table extraction helps here. Especially as it > necessitates indexing against ARRAY_SIZE - 2. > > >>> + return MODE_CLOCK_HIGH; > >>> + > >>> + return MODE_OK; > >>> +} > >>> + > >>> static int rcar_hdmi_phy_configure(struct dw_hdmi *hdmi, > >>> const struct dw_hdmi_plat_data *pdata, > >>> unsigned long mpixelclock) > >>> @@ -59,6 +69,7 @@ static int rcar_hdmi_phy_configure(struct dw_hdmi > >>> *hdmi, > >>> } > >>> > >>> static const struct dw_hdmi_plat_data rcar_dw_hdmi_plat_data = { > >>> + .mode_valid = rcar_hdmi_mode_valid, > >>> .configure_phy = rcar_hdmi_phy_configure, > >>> }; -- Regards, Laurent Pinchart From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laurent Pinchart Subject: Re: [PATCH] drm: rcar-du: dw-hdmi: Reject modes with a too high clock frequency Date: Fri, 23 Nov 2018 18:46:14 +0200 Message-ID: <2788457.YuS02OmuOc@avalon> References: <20181123143459.13133-1-laurent.pinchart+renesas@ideasonboard.com> <2327045.9znzjyYO5t@avalon> <7366b1db-0123-6ed4-9b05-7d7c0aeef303@ideasonboard.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id B378E6E5B7 for ; Fri, 23 Nov 2018 16:45:55 +0000 (UTC) In-Reply-To: <7366b1db-0123-6ed4-9b05-7d7c0aeef303@ideasonboard.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: kieran.bingham@ideasonboard.com Cc: linux-renesas-soc@vger.kernel.org, Laurent Pinchart , dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org SGkgS2llcmFuLAoKT24gRnJpZGF5LCAyMyBOb3ZlbWJlciAyMDE4IDE3OjMwOjQzIEVFVCBLaWVy YW4gQmluZ2hhbSB3cm90ZToKPiBPbiAyMy8xMS8yMDE4IDE0OjQ3LCBMYXVyZW50IFBpbmNoYXJ0 IHdyb3RlOgo+ID4gT24gRnJpZGF5LCAyMyBOb3ZlbWJlciAyMDE4IDE2OjQzOjI4IEVFVCBLaWVy YW4gQmluZ2hhbSB3cm90ZToKPiA+PiBPbiAyMy8xMS8yMDE4IDE0OjM0LCBMYXVyZW50IFBpbmNo YXJ0IHdyb3RlOgo+ID4+PiBJbXBsZW1lbnQgYSAubW9kZV92YWxpZCgpIGhhbmRsZXIgaW4gdGhl IFItQ2FyIGdsdWUgbGF5ZXIgdG8gcmVqZWN0Cj4gPj4+IG1vZGVzIHdpdGggYW4gdW5zdXBwb3J0 ZWQgY2xvY2sgZnJlcXVlbmN5Lgo+ID4+PiAKPiA+Pj4gU2lnbmVkLW9mZi1ieTogTGF1cmVudCBQ aW5jaGFydAo+ID4+PiA8bGF1cmVudC5waW5jaGFydCtyZW5lc2FzQGlkZWFzb25ib2FyZC5jb20+ Cj4gPj4+IC0tLQo+ID4+PiAKPiA+Pj4gIGRyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHdf aGRtaS5jIHwgMTEgKysrKysrKysrKysKPiA+Pj4gIDEgZmlsZSBjaGFuZ2VkLCAxMSBpbnNlcnRp b25zKCspCj4gPj4+IAo+ID4+PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL3JjYXItZHUv cmNhcl9kd19oZG1pLmMKPiA+Pj4gYi9kcml2ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R3X2hk bWkuYyBpbmRleAo+ID4+PiA3NTQ5MGEzZTBhMmEuLjhhNjAzMjM1ZjIyZAo+ID4+PiAxMDA2NDQK PiA+Pj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL3JjYXItZHUvcmNhcl9kd19oZG1pLmMKPiA+Pj4g KysrIGIvZHJpdmVycy9ncHUvZHJtL3JjYXItZHUvcmNhcl9kd19oZG1pLmMKPiA+Pj4gQEAgLTM1 LDYgKzM1LDE2IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgcmNhcl9oZG1pX3BoeV9wYXJhbXMKPiA+ Pj4gcmNhcl9oZG1pX3BoeV9wYXJhbXNbXSA9IHsKPiA+Pj4gIAl7IH4wVUwsICAgICAgMHgwMDAw LCAweDAwMDAsIDB4MDAwMCB9LAo+ID4+PiAgfTsKPiA+Pj4gCj4gPj4+ICtzdGF0aWMgZW51bSBk cm1fbW9kZV9zdGF0dXMKPiA+Pj4gK3JjYXJfaGRtaV9tb2RlX3ZhbGlkKHN0cnVjdCBkcm1fY29u bmVjdG9yICpjb25uZWN0b3IsCj4gPj4+ICsJCSAgICAgY29uc3Qgc3RydWN0IGRybV9kaXNwbGF5 X21vZGUgKm1vZGUpCj4gPj4+ICt7Cj4gPj4+ICsJaWYgKG1vZGUtPmNsb2NrID4gMjk3MDAwKQo+ ID4+IAo+ID4+IElzIDI5NzAwIGNvbnN0YW50PyBDYW4gaXQgYmUgZGV0ZXJtaW5lZCBmcm9tIGFu eSBvdGhlciBsb2NhdGlvbiBvciBpcyBpdAo+ID4+IGp1c3QgYSBtYWdpY2FsbHkga25vd24gcGxh dGZvcm0gdmFsdWU/Cj4gPiAKPiA+IEl0J3MgdGhlIGxhc3QgZW50cnkgb2YgdGhlIHJjYXJfaGRt aV9waHlfcGFyYW1zIHRhYmxlIGFib3ZlLiBJIGNvbnNpZGVyZWQKPiA+IHdyaXRpbmcgaXQKPiA+ IAo+ID4gCWlmIChtb2RlLT5jbG9jayA+Cj4gPiAKPiA+IHJjYXJfaGRtaV9waHlfcGFyYW1zW0FS UkFZX1NJWkUocmNhcl9oZG1pX3BoeV9wYXJhbXMpLTJdLm1waXhlbGNsb2NrKQo+ID4gCj4gPiBi dXQgZm91bmQgaXQgYSBidXQgaGFyZCB0byBwYXJzZS4gRG8geW91IHRoaW5rIGl0IHdvdWxkIGJl IGJldHRlciA/Cj4gCj4gV2VsbCAtIGZvciByZWFkYWJpbGl0eSAtIG5vLAo+IAo+IEJ1dCBmb3Ig YWNjdXJhY3kgLSB5ZXM6Cj4gCj4gCTI5NzAwMDAwMCAhPSAyOTcwMDAKPiAKPiBVbmxlc3MgdGhl IC8xMDAwIGlzIGludGVudGlvbmFsPwoKSSB3b3VsZCBoYXZlIGhhZCB0byB3cml0ZSAvIDEwMDAg aW5kZWVkIDotKSBtb2RlLT5jbG9jayBpcyBleHByZXNzZWQgaW4ga0h6LgoKPiBIb3cgYWJvdXQg a2VlcCB0aGUgKGNvcnJlY3RlZD8pIGNvbnN0YW50IHZhbHVlLCBidXQgYWRkIGEgY29tbWVudAo+ IHJlZmVyZW5jaW5nIGl0J3MgZXh0cmFjdGlvbi4KCkdvb2QgaWRlYSwgSSdsbCBkbyBzby4KCj4g SSBkb24ndCB0aGluayB0aGUgY29kZWQgdGFibGUgZXh0cmFjdGlvbiBoZWxwcyBoZXJlLiBFc3Bl Y2lhbGx5IGFzIGl0Cj4gbmVjZXNzaXRhdGVzIGluZGV4aW5nIGFnYWluc3QgQVJSQVlfU0laRSAt IDIuCj4gCj4gPj4+ICsJCXJldHVybiBNT0RFX0NMT0NLX0hJR0g7Cj4gPj4+ICsKPiA+Pj4gKwly ZXR1cm4gTU9ERV9PSzsKPiA+Pj4gK30KPiA+Pj4gKwo+ID4+PiAgc3RhdGljIGludCByY2FyX2hk bWlfcGh5X2NvbmZpZ3VyZShzdHJ1Y3QgZHdfaGRtaSAqaGRtaSwKPiA+Pj4gIAkJCQkgICBjb25z dCBzdHJ1Y3QgZHdfaGRtaV9wbGF0X2RhdGEgKnBkYXRhLAo+ID4+PiAgCQkJCSAgIHVuc2lnbmVk IGxvbmcgbXBpeGVsY2xvY2spCj4gPj4+IEBAIC01OSw2ICs2OSw3IEBAIHN0YXRpYyBpbnQgcmNh cl9oZG1pX3BoeV9jb25maWd1cmUoc3RydWN0IGR3X2hkbWkKPiA+Pj4gKmhkbWksCj4gPj4+ICB9 Cj4gPj4+ICAKPiA+Pj4gIHN0YXRpYyBjb25zdCBzdHJ1Y3QgZHdfaGRtaV9wbGF0X2RhdGEgcmNh cl9kd19oZG1pX3BsYXRfZGF0YSA9IHsKPiA+Pj4gKwkubW9kZV92YWxpZCA9IHJjYXJfaGRtaV9t b2RlX3ZhbGlkLAo+ID4+PiAgCS5jb25maWd1cmVfcGh5CT0gcmNhcl9oZG1pX3BoeV9jb25maWd1 cmUsCj4gPj4+ICB9OwoKLS0gClJlZ2FyZHMsCgpMYXVyZW50IFBpbmNoYXJ0CgoKCl9fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5n IGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVk ZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo=