From: Vasant Hegde <vasant.hegde@amd.com>
To: Sairaj Kodilkar <sarunkod@amd.com>, qemu-devel@nongnu.org
Cc: alejandro.j.jimenez@oracle.com, pbonzini@redhat.com,
richard.henderson@linaro.org, eduardo@habkost.net,
mst@redhat.com, marcel.apfelbaum@gmail.com,
clement.mathieu--drif@eviden.com
Subject: Re: [PATCH v3 2/3] amd_iommu: Turn on XT support only when guest has enabled it
Date: Tue, 3 Mar 2026 15:09:19 +0530 [thread overview]
Message-ID: <27d6b36b-c8df-466f-bf67-26e70ef34cb8@amd.com> (raw)
In-Reply-To: <20260302115130.5903-3-sarunkod@amd.com>
On 3/2/2026 5:21 PM, Sairaj Kodilkar wrote:
> Current code uses 32 bit destination ID irrespective of the fact that
> guest has enabled x2APIC support through control register[XTEn] and
> completely depends on command line parameter xtsup=on. This is not a
> correct hardware behaviour and can cause problems in the guest which has
> not enabled XT mode.
>
> Introduce new flag "xten", which is enabled when guest writes 1 to the
> control register bit 50 (XTEn). Also, add a new subsection in
> `VMStateDescription` for backward compatibility during vm migration.
>
> Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
> Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
> Reviewed-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
> ---
> hw/i386/amd_iommu.c | 21 +++++++++++++++++++--
> hw/i386/amd_iommu.h | 4 +++-
> 2 files changed, 22 insertions(+), 3 deletions(-)
>
> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
> index f5aa9c763d02..4a86e62a3b92 100644
> --- a/hw/i386/amd_iommu.c
> +++ b/hw/i386/amd_iommu.c
> @@ -1523,6 +1523,8 @@ static void amdvi_handle_control_write(AMDVIState *s)
> s->cmdbuf_enabled = s->enabled && !!(control &
> AMDVI_MMIO_CONTROL_CMDBUFLEN);
> s->ga_enabled = !!(control & AMDVI_MMIO_CONTROL_GAEN);
> + s->xten = !!(control & AMDVI_MMIO_CONTROL_XTEN) && s->xtsup &&
> + s->ga_enabled;
>
> /* update the flags depending on the control register */
> if (s->cmdbuf_enabled) {
> @@ -1996,7 +1998,7 @@ static int amdvi_int_remap_ga(AMDVIState *iommu,
> irq->vector = irte.hi.fields.vector;
> irq->dest_mode = irte.lo.fields_remap.dm;
> irq->redir_hint = irte.lo.fields_remap.rq_eoi;
> - if (iommu->xtsup) {
> + if (iommu->xten) {
> irq->dest = irte.lo.fields_remap.destination |
> (irte.hi.fields.destination_hi << 24);
> } else {
> @@ -2379,6 +2381,7 @@ static void amdvi_init(AMDVIState *s)
> s->mmio_enabled = false;
> s->enabled = false;
> s->cmdbuf_enabled = false;
> + s->xten = false;
>
> /* reset MMIO */
> memset(s->mmior, 0, AMDVI_MMIO_SIZE);
> @@ -2443,6 +2446,16 @@ static void amdvi_sysbus_reset(DeviceState *dev)
> amdvi_reset_address_translation_all(s);
> }
>
> +static const VMStateDescription vmstate_xt = {
> + .name = "amd-iommu-xt",
> + .version_id = 1,
> + .minimum_version_id = 1,
Wrong indentation. Otherwise patch looks good.
-Vasant
next prev parent reply other threads:[~2026-03-03 9:44 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-02 11:51 [PATCH v3 0/3] amd_iommu: Support Generation of IOMMU XT interrupts Sairaj Kodilkar
2026-03-02 11:51 ` [PATCH v3 1/3] amd_iommu: Use switch case to determine mmio register name Sairaj Kodilkar
2026-03-12 21:59 ` Alejandro Jimenez
2026-03-13 0:36 ` Alejandro Jimenez
2026-03-13 4:49 ` Sairaj Kodilkar
2026-03-02 11:51 ` [PATCH v3 2/3] amd_iommu: Turn on XT support only when guest has enabled it Sairaj Kodilkar
2026-03-03 9:39 ` Vasant Hegde [this message]
2026-03-03 10:20 ` Sairaj Kodilkar
2026-03-02 11:51 ` [PATCH v3 3/3] amd_iommu: Generate XT interrupts when xt support is enabled Sairaj Kodilkar
2026-03-03 9:47 ` Vasant Hegde
2026-03-03 9:55 ` Sairaj Kodilkar
2026-03-13 0:16 ` Alejandro Jimenez
2026-03-13 5:20 ` Sairaj Kodilkar
2026-03-13 16:17 ` Alejandro Jimenez
2026-03-16 7:04 ` Sairaj Kodilkar
2026-03-17 1:10 ` [PATCH v3 0/3] amd_iommu: Support Generation of IOMMU XT interrupts Alejandro Jimenez
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