From: Thomas Monjalon <thomas@monjalon.net>
To: Shreyansh Jain <shreyansh.jain@nxp.com>
Cc: dev@dpdk.org, hemant.agrawal@nxp.com, akhil.goyal@nxp.com,
anatoly.burakov@intel.com
Subject: Re: [PATCH v2 2/3] bus/fslmc: optimize physical to virtual address searching
Date: Fri, 27 Apr 2018 21:24:19 +0200 [thread overview]
Message-ID: <2860578.1zL41RiOr7@xps> (raw)
In-Reply-To: <8268731.ksAW2z75G4@xps>
27/04/2018 20:49, Thomas Monjalon:
> 27/04/2018 19:20, Shreyansh Jain:
> > --- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
> > +++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
> > @@ -254,15 +254,38 @@ enum qbman_fd_format {
> > */
> > #define DPAA2_EQ_RESP_ALWAYS 1
> >
> > +/* Various structures representing contiguous memory maps */
> > +struct dpaa2_memseg {
> > + TAILQ_ENTRY(dpaa2_memseg) next;
> > + char *vaddr;
> > + rte_iova_t iova;
> > + size_t len;
> > +};
> > +
> > +TAILQ_HEAD(dpaa2_memseg_list, dpaa2_memseg);
> > +extern struct dpaa2_memseg_list dpaa2_memsegs;
>
> Shared compilation is broken without following patch:
>
> --- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
> +++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
> @@ -105,5 +105,6 @@ DPDK_18.05 {
> global:
>
> dpaa2_affine_qbman_ethrx_swp;
> + dpaa2_memsegs;
>
> } DPDK_18.02;
Right fix is:
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -263,7 +263,7 @@ struct dpaa2_memseg {
};
TAILQ_HEAD(dpaa2_memseg_list, dpaa2_memseg);
-extern struct dpaa2_memseg_list dpaa2_memsegs;
+extern struct dpaa2_memseg_list rte_dpaa2_memsegs;
#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
extern uint8_t dpaa2_virt_mode;
@@ -279,10 +279,10 @@ static void *dpaa2_mem_ptov(phys_addr_t paddr)
/* Check if the address is already part of the memseg list internally
* maintained by the dpaa2 driver.
*/
- TAILQ_FOREACH(ms, &dpaa2_memsegs, next) {
+ TAILQ_FOREACH(ms, &rte_dpaa2_memsegs, next) {
if (paddr >= ms->iova && paddr <
ms->iova + ms->len)
- return RTE_PTR_ADD(ms->vaddr, (paddr - ms->iova));
+ return RTE_PTR_ADD(ms->vaddr, (uintptr_t)(paddr - ms->iova));
}
/* If not, Fallback to full memseg list searching */
--- a/drivers/event/dpaa2/Makefile
+++ b/drivers/event/dpaa2/Makefile
@@ -18,7 +18,8 @@ CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/portal
CFLAGS += -I$(RTE_SDK)/drivers/mempool/dpaa2
CFLAGS += -I$(RTE_SDK)/drivers/event/dpaa2
CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal
-LDLIBS += -lrte_eal -lrte_eventdev -lrte_bus_fslmc -lrte_pmd_dpaa2
+LDLIBS += -lrte_eal -lrte_eventdev
+LDLIBS += -lrte_bus_fslmc -lrte_mempool_dpaa2 -lrte_pmd_dpaa2
LDLIBS += -lrte_bus_vdev
CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2
CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2/mc
--- a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
+++ b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
@@ -36,8 +36,8 @@ static struct dpaa2_bp_list *h_bp_list;
* is to optimize the PA_to_VA searches until a better mechanism (algo) is
* available.
*/
-struct dpaa2_memseg_list dpaa2_memsegs
- = TAILQ_HEAD_INITIALIZER(dpaa2_memsegs);
+struct dpaa2_memseg_list rte_dpaa2_memsegs
+ = TAILQ_HEAD_INITIALIZER(rte_dpaa2_memsegs);
/* Dynamic logging identified for mempool */
int dpaa2_logtype_mempool;
@@ -394,7 +394,7 @@ dpaa2_populate(struct rte_mempool *mp, unsigned int max_objs,
/* Head insertions are generally faster than tail insertions as the
* buffers pinned are picked from rear end.
*/
- TAILQ_INSERT_HEAD(&dpaa2_memsegs, ms, next);
+ TAILQ_INSERT_HEAD(&rte_dpaa2_memsegs, ms, next);
return rte_mempool_op_populate_default(mp, max_objs, vaddr, paddr, len,
obj_cb, obj_cb_arg);
--- a/drivers/mempool/dpaa2/rte_mempool_dpaa2_version.map
+++ b/drivers/mempool/dpaa2/rte_mempool_dpaa2_version.map
@@ -3,6 +3,7 @@ DPDK_17.05 {
rte_dpaa2_bpid_info;
rte_dpaa2_mbuf_alloc_bulk;
+ rte_dpaa2_memsegs;
local: *;
};
next prev parent reply other threads:[~2018-04-27 19:24 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-27 16:25 [PATCH 0/3] Optimization for DPAA/DPAA2 for PA/VA Addressing Shreyansh Jain
2018-04-27 16:25 ` [PATCH 1/3] crypto/dpaa_sec: remove ctx based offset for PA-VA conversion Shreyansh Jain
2018-04-27 16:25 ` [PATCH 2/3] bus/fslmc: optimize physical to virtual address searching Shreyansh Jain
2018-04-27 16:25 ` [PATCH 3/3] bus/dpaa: " Shreyansh Jain
2018-04-27 17:20 ` [PATCH v2 0/3] Optimization for DPAA/DPAA2 for PA/VA Addressing Shreyansh Jain
2018-04-27 17:20 ` [PATCH v2 1/3] crypto/dpaa_sec: remove ctx based offset for PA-VA conversion Shreyansh Jain
2018-04-27 17:20 ` [PATCH v2 2/3] bus/fslmc: optimize physical to virtual address searching Shreyansh Jain
2018-04-27 18:49 ` Thomas Monjalon
2018-04-27 19:24 ` Thomas Monjalon [this message]
2018-04-27 17:20 ` [PATCH v2 3/3] bus/dpaa: " Shreyansh Jain
2018-04-27 19:32 ` Thomas Monjalon
2018-04-27 19:38 ` [PATCH v2 0/3] Optimization for DPAA/DPAA2 for PA/VA Addressing Thomas Monjalon
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