From: Jie Gan <jie.gan@oss.qualcomm.com>
To: Songwei Chai <songwei.chai@oss.qualcomm.com>,
andersson@kernel.org, alexander.shishkin@linux.intel.com,
mike.leach@linaro.org, konrad.dybcio@oss.qualcomm.com,
suzuki.poulose@arm.com, james.clark@arm.com, krzk+dt@kernel.org,
conor+dt@kernel.org
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org,
devicetree@vger.kernel.org, gregkh@linuxfoundation.org
Subject: Re: [PATCH v12 6/7] qcom-tgu: Add timer/counter functionality for TGU
Date: Wed, 18 Mar 2026 21:49:07 +0800 [thread overview]
Message-ID: <2bb28022-e77c-4459-8b03-6ee7713798e7@oss.qualcomm.com> (raw)
In-Reply-To: <20260317032639.2393221-7-songwei.chai@oss.qualcomm.com>
On 3/17/2026 11:26 AM, Songwei Chai wrote:
> Add counter and timer node for each step which could be
> programed if they are to be utilized in trigger event/sequence.
>
Reviewed-by: Jie Gan <jie.gan@oss.qualcomm.com>
> Signed-off-by: Songwei Chai <songwei.chai@oss.qualcomm.com>
> ---
> .../ABI/testing/sysfs-bus-amba-devices-tgu | 14 +++
> drivers/hwtracing/qcom/tgu.c | 116 +++++++++++++++++-
> drivers/hwtracing/qcom/tgu.h | 56 +++++++++
> 3 files changed, 184 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu
> index d8431a82574a..5370882333bc 100644
> --- a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu
> +++ b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu
> @@ -28,3 +28,17 @@ KernelVersion 7.1
> Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Songwei Chai <songwei.chai@oss.qualcomm.com>
> Description:
> (RW) Set/Get the next action with specific step for TGU.
> +
> +What: /sys/bus/amba/devices/<tgu-name>/step[0:7]_timer/reg[0:1]
> +Date: March 2026
> +KernelVersion 7.1
> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Songwei Chai <songwei.chai@oss.qualcomm.com>
> +Description:
> + (RW) Set/Get the timer value with specific step for TGU.
> +
> +What: /sys/bus/amba/devices/<tgu-name>/step[0:7]_counter/reg[0:1]
> +Date: March 2026
> +KernelVersion 7.1
> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Songwei Chai <songwei.chai@oss.qualcomm.com>
> +Description:
> + (RW) Set/Get the counter value with specific step for TGU.
> diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c
> index 1d996b9e303a..4539415571f6 100644
> --- a/drivers/hwtracing/qcom/tgu.c
> +++ b/drivers/hwtracing/qcom/tgu.c
> @@ -32,6 +32,10 @@ static int calculate_array_location(struct tgu_drvdata *drvdata,
> case TGU_CONDITION_SELECT:
> return step_index * (drvdata->num_condition_select) +
> reg_index;
> + case TGU_COUNTER:
> + return step_index * (drvdata->num_counter) + reg_index;
> + case TGU_TIMER:
> + return step_index * (drvdata->num_timer) + reg_index;
> default:
> break;
> }
> @@ -77,6 +81,12 @@ static ssize_t tgu_dataset_show(struct device *dev,
> case TGU_CONDITION_SELECT:
> return sysfs_emit(buf, "0x%x\n",
> drvdata->value_table->condition_select[index]);
> + case TGU_TIMER:
> + return sysfs_emit(buf, "0x%x\n",
> + drvdata->value_table->timer[index]);
> + case TGU_COUNTER:
> + return sysfs_emit(buf, "0x%x\n",
> + drvdata->value_table->counter[index]);
> default:
> break;
> }
> @@ -122,6 +132,14 @@ static ssize_t tgu_dataset_store(struct device *dev,
> tgu_drvdata->value_table->condition_select[index] = val;
> ret = size;
> break;
> + case TGU_TIMER:
> + tgu_drvdata->value_table->timer[index] = val;
> + ret = size;
> + break;
> + case TGU_COUNTER:
> + tgu_drvdata->value_table->counter[index] = val;
> + ret = size;
> + break;
> default:
> ret = -EINVAL;
> break;
> @@ -163,6 +181,18 @@ static umode_t tgu_node_visible(struct kobject *kobject,
> if (tgu_attr->reg_num < drvdata->num_condition_select)
> return attr->mode;
> break;
> + case TGU_COUNTER:
> + if (!drvdata->num_counter)
> + break;
> + if (tgu_attr->reg_num < drvdata->num_counter)
> + return attr->mode;
> + break;
> + case TGU_TIMER:
> + if (!drvdata->num_timer)
> + break;
> + if (tgu_attr->reg_num < drvdata->num_timer)
> + return attr->mode;
> + break;
> default:
> break;
> }
> @@ -213,6 +243,30 @@ static ssize_t tgu_write_all_hw_regs(struct tgu_drvdata *drvdata)
> drvdata->base + CONDITION_SELECT_STEP(i, j));
> }
> }
> +
> + for (i = 0; i < drvdata->num_step; i++) {
> + for (j = 0; j < drvdata->num_timer; j++) {
> + index = check_array_location(drvdata, i, TGU_TIMER, j);
> +
> + if (index == -EINVAL)
> + goto exit;
> +
> + writel(drvdata->value_table->timer[index],
> + drvdata->base + TIMER_COMPARE_STEP(i, j));
> + }
> + }
> +
> + for (i = 0; i < drvdata->num_step; i++) {
> + for (j = 0; j < drvdata->num_counter; j++) {
> + index = check_array_location(drvdata, i, TGU_COUNTER, j);
> +
> + if (index == -EINVAL)
> + goto exit;
> +
> + writel(drvdata->value_table->counter[index],
> + drvdata->base + COUNTER_COMPARE_STEP(i, j));
> + }
> + }
> /* Enable TGU to program the triggers */
> writel(1, drvdata->base + TGU_CONTROL);
> exit:
> @@ -256,6 +310,27 @@ static void tgu_set_conditions(struct tgu_drvdata *drvdata)
> drvdata->num_condition_select = TGU_DEVID_CONDITIONS(devid) + 1;
> }
>
> +static void tgu_set_timer_counter(struct tgu_drvdata *drvdata)
> +{
> + int num_timers = 0, num_counters = 0;
> + u32 devid2;
> +
> + devid2 = readl(drvdata->base + CORESIGHT_DEVID2);
> +
> + if (TGU_DEVID2_TIMER0(devid2))
> + num_timers++;
> + if (TGU_DEVID2_TIMER1(devid2))
> + num_timers++;
> +
> + if (TGU_DEVID2_COUNTER0(devid2))
> + num_counters++;
> + if (TGU_DEVID2_COUNTER1(devid2))
> + num_counters++;
> +
> + drvdata->num_timer = num_timers;
> + drvdata->num_counter = num_counters;
> +}
> +
> static int tgu_enable(struct device *dev)
> {
> struct tgu_drvdata *drvdata = dev_get_drvdata(dev);
> @@ -395,6 +470,22 @@ static const struct attribute_group *tgu_attr_groups[] = {
> CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(5),
> CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(6),
> CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(7),
> + TIMER_ATTRIBUTE_GROUP_INIT(0),
> + TIMER_ATTRIBUTE_GROUP_INIT(1),
> + TIMER_ATTRIBUTE_GROUP_INIT(2),
> + TIMER_ATTRIBUTE_GROUP_INIT(3),
> + TIMER_ATTRIBUTE_GROUP_INIT(4),
> + TIMER_ATTRIBUTE_GROUP_INIT(5),
> + TIMER_ATTRIBUTE_GROUP_INIT(6),
> + TIMER_ATTRIBUTE_GROUP_INIT(7),
> + COUNTER_ATTRIBUTE_GROUP_INIT(0),
> + COUNTER_ATTRIBUTE_GROUP_INIT(1),
> + COUNTER_ATTRIBUTE_GROUP_INIT(2),
> + COUNTER_ATTRIBUTE_GROUP_INIT(3),
> + COUNTER_ATTRIBUTE_GROUP_INIT(4),
> + COUNTER_ATTRIBUTE_GROUP_INIT(5),
> + COUNTER_ATTRIBUTE_GROUP_INIT(6),
> + COUNTER_ATTRIBUTE_GROUP_INIT(7),
> NULL,
> };
>
> @@ -402,8 +493,8 @@ static int tgu_probe(struct amba_device *adev, const struct amba_id *id)
> {
> struct device *dev = &adev->dev;
> struct tgu_drvdata *drvdata;
> - unsigned int *priority, *condition, *select;
> - size_t priority_size, condition_size, select_size;
> + unsigned int *priority, *condition, *select, *timer, *counter;
> + size_t priority_size, condition_size, select_size, timer_size, counter_size;
> int ret;
>
> drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
> @@ -422,6 +513,7 @@ static int tgu_probe(struct amba_device *adev, const struct amba_id *id)
> tgu_set_reg_number(drvdata);
> tgu_set_steps(drvdata);
> tgu_set_conditions(drvdata);
> + tgu_set_timer_counter(drvdata);
>
> ret = sysfs_create_groups(&dev->kobj, tgu_attr_groups);
> if (ret) {
> @@ -464,6 +556,26 @@ static int tgu_probe(struct amba_device *adev, const struct amba_id *id)
>
> drvdata->value_table->condition_select = select;
>
> + timer_size = drvdata->num_step * drvdata->num_timer;
> +
> + timer = devm_kcalloc(dev, timer_size,
> + sizeof(*(drvdata->value_table->timer)),
> + GFP_KERNEL);
> + if (!timer)
> + return -ENOMEM;
> +
> + drvdata->value_table->timer = timer;
> +
> + counter_size = drvdata->num_step * drvdata->num_counter;
> +
> + counter = devm_kcalloc(dev, counter_size,
> + sizeof(*(drvdata->value_table->counter)),
> + GFP_KERNEL);
> + if (!counter)
> + return -ENOMEM;
> +
> + drvdata->value_table->counter = counter;
> +
> drvdata->enabled = false;
>
> pm_runtime_put(&adev->dev);
> diff --git a/drivers/hwtracing/qcom/tgu.h b/drivers/hwtracing/qcom/tgu.h
> index ac46a2875209..5dfef0afbad6 100644
> --- a/drivers/hwtracing/qcom/tgu.h
> +++ b/drivers/hwtracing/qcom/tgu.h
> @@ -11,6 +11,7 @@
> #define TGU_LAR 0xfb0
> #define TGU_UNLOCK_OFFSET 0xc5acce55
> #define TGU_DEVID 0xfc8
> +#define CORESIGHT_DEVID2 0xfc0
>
> #define TGU_DEVID_SENSE_INPUT(devid_val) \
> ((int)FIELD_GET(GENMASK(17, 10), devid_val))
> @@ -18,6 +19,16 @@
> ((int)FIELD_GET(GENMASK(6, 3), devid_val))
> #define TGU_DEVID_CONDITIONS(devid_val) \
> ((int)FIELD_GET(GENMASK(2, 0), devid_val))
> +#define TGU_DEVID2_TIMER0(devid_val) \
> + ((int)FIELD_GET(GENMASK(23, 18), devid_val))
> +#define TGU_DEVID2_TIMER1(devid_val) \
> + ((int)FIELD_GET(GENMASK(17, 13), devid_val))
> +#define TGU_DEVID2_COUNTER0(devid_val) \
> + ((int)FIELD_GET(GENMASK(11, 6), devid_val))
> +#define TGU_DEVID2_COUNTER1(devid_val) \
> + ((int)FIELD_GET(GENMASK(5, 0), devid_val))
> +
> +
> #define TGU_BITS_PER_SIGNAL 4
> #define LENGTH_REGISTER 32
>
> @@ -53,6 +64,8 @@
> #define PRIORITY_START_OFFSET 0x0074
> #define CONDITION_DECODE_OFFSET 0x0050
> #define CONDITION_SELECT_OFFSET 0x0060
> +#define TIMER_START_OFFSET 0x0040
> +#define COUNTER_START_OFFSET 0x0048
> #define PRIORITY_OFFSET 0x60
> #define REG_OFFSET 0x4
>
> @@ -67,6 +80,12 @@
> #define CONDITION_SELECT_STEP(step, select) \
> (CONDITION_SELECT_OFFSET + REG_OFFSET * select + STEP_OFFSET * step)
>
> +#define TIMER_COMPARE_STEP(step, timer) \
> + (TIMER_START_OFFSET + REG_OFFSET * timer + STEP_OFFSET * step)
> +
> +#define COUNTER_COMPARE_STEP(step, counter) \
> + (COUNTER_START_OFFSET + REG_OFFSET * counter + STEP_OFFSET * step)
> +
> #define tgu_dataset_rw(name, step_index, type, reg_num) \
> (&((struct tgu_attribute[]){ { \
> __ATTR(name, 0644, tgu_dataset_show, tgu_dataset_store), \
> @@ -82,6 +101,10 @@
> tgu_dataset_rw(reg##reg_num, step_index, TGU_CONDITION_DECODE, reg_num)
> #define STEP_SELECT(step_index, reg_num) \
> tgu_dataset_rw(reg##reg_num, step_index, TGU_CONDITION_SELECT, reg_num)
> +#define STEP_TIMER(step_index, reg_num) \
> + tgu_dataset_rw(reg##reg_num, step_index, TGU_TIMER, reg_num)
> +#define STEP_COUNTER(step_index, reg_num) \
> + tgu_dataset_rw(reg##reg_num, step_index, TGU_COUNTER, reg_num)
>
> #define STEP_PRIORITY_LIST(step_index, priority) \
> {STEP_PRIORITY(step_index, 0, priority), \
> @@ -122,6 +145,18 @@
> NULL \
> }
>
> +#define STEP_TIMER_LIST(n) \
> + {STEP_TIMER(n, 0), \
> + STEP_TIMER(n, 1), \
> + NULL \
> + }
> +
> +#define STEP_COUNTER_LIST(n) \
> + {STEP_COUNTER(n, 0), \
> + STEP_COUNTER(n, 1), \
> + NULL \
> + }
> +
> #define PRIORITY_ATTRIBUTE_GROUP_INIT(step, priority)\
> (&(const struct attribute_group){\
> .attrs = (struct attribute*[])STEP_PRIORITY_LIST(step, priority),\
> @@ -143,6 +178,19 @@
> .name = "step" #step "_condition_select" \
> })
>
> +#define TIMER_ATTRIBUTE_GROUP_INIT(step)\
> + (&(const struct attribute_group){\
> + .attrs = (struct attribute*[])STEP_TIMER_LIST(step),\
> + .is_visible = tgu_node_visible,\
> + .name = "step" #step "_timer" \
> + })
> +
> +#define COUNTER_ATTRIBUTE_GROUP_INIT(step)\
> + (&(const struct attribute_group){\
> + .attrs = (struct attribute*[])STEP_COUNTER_LIST(step),\
> + .is_visible = tgu_node_visible,\
> + .name = "step" #step "_counter" \
> + })
>
> enum operation_index {
> TGU_PRIORITY0,
> @@ -151,6 +199,8 @@ enum operation_index {
> TGU_PRIORITY3,
> TGU_CONDITION_DECODE,
> TGU_CONDITION_SELECT,
> + TGU_TIMER,
> + TGU_COUNTER
> };
>
> /* Maximum priority that TGU supports */
> @@ -167,6 +217,8 @@ struct value_table {
> unsigned int *priority;
> unsigned int *condition_decode;
> unsigned int *condition_select;
> + unsigned int *timer;
> + unsigned int *counter;
> };
>
> static inline void TGU_LOCK(void __iomem *addr)
> @@ -198,6 +250,8 @@ static inline void TGU_UNLOCK(void __iomem *addr)
> * @num_step: Maximum step size
> * @num_condition_decode: Maximum number of condition_decode
> * @num_condition_select: Maximum number of condition_select
> + * @num_timer: Maximum number of timers
> + * @num_counter: Maximum number of counters
> *
> * This structure defines the data associated with a TGU device,
> * including its base address, device pointers, clock, spinlock for
> @@ -214,6 +268,8 @@ struct tgu_drvdata {
> int num_step;
> int num_condition_decode;
> int num_condition_select;
> + int num_timer;
> + int num_counter;
> };
>
> #endif
next prev parent reply other threads:[~2026-03-18 13:49 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-17 3:26 [PATCH v12 0/7] Provide support for Trigger Generation Unit Songwei Chai
2026-03-17 3:26 ` [PATCH v12 1/7] dt-bindings: arm: Add support for Qualcomm TGU trace Songwei Chai
2026-03-17 3:26 ` [PATCH v12 2/7] qcom-tgu: Add TGU driver Songwei Chai
2026-03-18 13:39 ` Jie Gan
2026-03-27 2:16 ` Jie Gan
2026-04-02 2:04 ` Songwei.Chai
2026-03-27 2:35 ` Jie Gan
2026-04-02 2:03 ` Songwei.Chai
2026-03-17 3:26 ` [PATCH v12 3/7] qcom-tgu: Add signal priority support Songwei Chai
2026-03-18 13:41 ` Jie Gan
2026-03-17 3:26 ` [PATCH v12 4/7] qcom-tgu: Add TGU decode support Songwei Chai
2026-03-18 13:45 ` Jie Gan
2026-08-13 21:45 ` sashiko-bot
2026-03-17 3:26 ` [PATCH v12 5/7] qcom-tgu: Add support to configure next action Songwei Chai
2026-03-18 13:47 ` Jie Gan
2026-03-17 3:26 ` [PATCH v12 6/7] qcom-tgu: Add timer/counter functionality for TGU Songwei Chai
2026-03-18 13:49 ` Jie Gan [this message]
2026-03-17 3:26 ` [PATCH v12 7/7] qcom-tgu: Add reset node to initialize Songwei Chai
2026-03-18 13:50 ` Jie Gan
2026-03-27 2:26 ` Jie Gan
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