RE: ECC memory of BMC

["Will Liang (梁永鉉)" <Will.Liang@quantatw.com>]

> 
> Hello Will,
> 
> 
> One more thing about enabling ECC:
> 
> > ECC needs to be enabled in u-boot. The reason is explained in my first
> > upload https://patchwork.kernel.org/patch/10732769/
> >
> > Our u-boot engineer did it for us. I see u-boot code is full of #ifdef
> CONFIG_DRAM_ECC blocks.
> > In theory, enabling this option should be enough.
> >
> >
> > - A good indication of having ECC successfully enabled is linux actually
> booting.
> > - Another indication is available memory being 8/9th of what it used
> > to be (check /proc/meminfo)
> > - Then, my driver should not log any errors in its probe function (check
> dmesg).
> 
> 
> While you have not set up ECC mode in u-boot yet, you might be able to use
> the edac driver by removing the following code in aspeed_probe()
> 
> 	/* bail out if ECC mode is not configured */
> 	regmap_read(aspeed_regmap, ASPEED_MCR_CONF, &reg04);
> 	if (!(reg04 & ASPEED_MCR_CONF_ECC)) {
> 		dev_err(&pdev->dev, "ECC mode is not configured in u-boot\n");
> 		return -EPERM;
> 	}
> 
> This will run the probe function hopefully to the end and expose the sysfs
> nodes.
> I have not tested it. Maybe you need to further butcher down the driver?
> 
> 
> You can then inject fake ecc errors via the kernel debug framework:
> 
> root@aspeed-arm:/# echo 42 > /sys/kernel/debug/edac/mc0/fake_inject
> 
> root@aspeed-arm:/# dmesg | tail -1
> [  293.020000] EDAC MC0: 1 CE FAKE ERROR on mc#0csrow#0channel#0
> (csrow:0 channel:0 page:0x0 offset:0x0 grain:0 syndrome:0x0 - for EDAC
> testing only)
> 
> root@aspeed-arm:/# cat /sys/devices/system/edac/mc/mc0/ce*
> 1
> 0
> 
> 
> BTW, here are my notes on EDAC and ECC on Aspeed which you might find
> interesting: http://students.engr.scu.edu/~sschaeck/misc/aspeed-edac.html
> 
> 
> 
> Hope that helps, Stefan

Hi Stefan,

Thanks for the updated information.
Instead of extending the kernel space, we are developing services in user space.

Will